lkml.org 
[lkml]   [2019]   [Jan]   [31]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
SubjectRe: [PATCH V8 2/5] i2c: tegra: Add Bus Clear Master Support
From
Date
31.01.2019 9:16, Sowjanya Komatineni пишет:
> Bus clear feature of tegra i2c controller helps to recover from
> bus hang when i2c master loses the bus arbitration due to the
> slave device holding SDA LOW continuously for some unknown reasons.
>
> Per I2C specification, the device that held the bus LOW should
> release it within 9 clock pulses.
>
> During bus clear operation, Tegra I2C controller sends 9 clock
> pulses and terminates the transaction with STOP condition.
> Upon successful bus clear operation, bus goes to idle state and
> driver retries the transaction.
>
> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
> ---
> [V5/V6/V7/V8]: Same as V4
> [V4]: Added I2C Bus Clear support patch to this version of series.
>

I haven't checked all of the bits in this patch, but at least -EAGAIN should work as expected on older Tegra's:

Reviewed-by: Dmitry Osipenko <digetx@gmail.com>

\
 
 \ /
  Last update: 2019-01-31 16:17    [W:0.116 / U:6.752 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site