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SubjectRe: [PATCH v5 2/2] drm/panel: Add Feiyang FY07024DI26A30-D MIPI-DSI LCD panel
On Tue, Jan 29, 2019 at 8:49 PM Sam Ravnborg <sam@ravnborg.org> wrote:
>
> Hi Jagan.
>
> > >
> > > I see DRM_MODE_ARG as mode argument, that print all mode timings but
> > > here we need only 3 timings out of it. do we really need? if yes
> > > please suggest an example.
> >
> > fyi: sent v6 for this except this change. Let me know if you have any
> > comments on this.
>
> Drivers looks fine, the above was just a quick suggestion to use some
> exising plumbing.
>
> You have done a nice job following up on all the feedback.

Thanks, hope v6 will be apply soon.

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