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SubjectRe: [RFC PATCH glibc 1/4] glibc: Perform rseq(2) registration at C startup and thread creation (v6)
On Tue, 29 Jan 2019, Mathieu Desnoyers wrote:

> I recalled that aarch64 defines RSEQ_SIG to a different value which maps to
> a valid trap instruction. So I plan to move the RSEQ_SIG define to per-arch
> headers like this:
>
> sysdeps/unix/sysv/linux/aarch64/bits/rseq.h | 24 ++
> sysdeps/unix/sysv/linux/arm/bits/rseq.h | 24 ++
> sysdeps/unix/sysv/linux/bits/rseq.h | 23 ++
> sysdeps/unix/sysv/linux/mips/bits/rseq.h | 24 ++
> sysdeps/unix/sysv/linux/powerpc/bits/rseq.h | 24 ++
> sysdeps/unix/sysv/linux/s390/bits/rseq.h | 24 ++
> sysdeps/unix/sysv/linux/x86/bits/rseq.h | 24 ++
>
> where "bits/rseq.h" contains a #error:
>
> # error "Architecture does not define RSEQ_SIG.
>
> sys/rseq.h will now include <bits/rseq.h>.

We're trying to reduce the number of cases where most or all new glibc
architecture ports need to provide a bits/ header, by making the generic
headers handle the common case. So a generic header with a #error, and
lots of architecture-specific headers mostly with the same value for
RSEQ_SIG, seems unfortunate. I'd hope the generic header could use a
generic value, with architecture-specific variants only for architectures
with some reason for a different value.

--
Joseph S. Myers
joseph@codesourcery.com

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