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SubjectRe: [RFC PATCH] drm/ttm: force cached mappings for system RAM on ARM
On Wed, 2019-01-16 at 07:35 +0000, Koenig, Christian wrote:
> No, but you answer the wrong question.
> See we don't want to have different mappings of cached and non-cached on
> the CPU, but rather want to know if a snooped DMA from the PCIe counts
> as cached access as well.
> As far as I know on x86 it doesn't, so when you have an un-cached page
> you can still access it with a snooping DMA read/write operation and
> don't cause trouble.

Hrm... well, if you map it uncached on the CPU on powerpc, a snoop DMA
will work fine too, it won't hit any cache. The only problem I'm aware
of is a core (or CAPI device) emiting non-cached load/stores colliding
with a cache snooper.

> > The old hack of using non-cached mapping to avoid snoop cost in AGP and
> > others is just that ... an ugly and horrible hacks that should have
> > never eventuated, when the search for performance pushes HW people into
> > utter insanity :)
> Well I agree that un-cached system memory makes things much more
> complicated for a questionable gain.
> But fact is we now have to deal with the mess, so no point in
> complaining about it to much :)

I wish we could just sent the HW designers home and tell them we won't
support that crap... oh well.


> Cheers,
> Christian.
> > Cheers,
> > Ben.
> >
> >

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