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Subject[PATCH 4.18 223/235] dmaengine: sh: rcar-dmac: avoid to write CHCR.TE to 1 if TCR is set to 0
4.18-stable review patch.  If anyone has any objections, please let me know.


From: Yoshihiro Shimoda <>

[ Upstream commit 538603c6026ce769eec633bb79349f5f287519c7 ]

This patch fixes an issue that unexpected retransfering happens
if TCR is set to 0 before rcar_dmac_sync_tcr() writes DE bit to
the CHCR register. For example, sh-sci driver can reproduce this
issue like below:

In rx_timer_fn(): /* CHCR DE bit may be set to 1 */
rcar_dmac_sync_tcr() /* TCR is possible to be set to 0 */

According to the description of commit 73a47bd0da66 ("dmaengine:
rcar-dmac: use TCRB instead of TCR for residue"), "this buffered data
will be transferred if CHCR::DE bit was cleared". So, this patch
doesn't need to check TCRB register.

Fixes: 73a47bd0da66 ("dmaengine: rcar-dmac: use TCRB instead of TCR for residue")
Signed-off-by: Yoshihiro Shimoda <>
Signed-off-by: Vinod Koul <>
Signed-off-by: Sasha Levin <>
Signed-off-by: Greg Kroah-Hartman <>
drivers/dma/sh/rcar-dmac.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)

--- a/drivers/dma/sh/rcar-dmac.c
+++ b/drivers/dma/sh/rcar-dmac.c
@@ -774,8 +774,9 @@ static void rcar_dmac_sync_tcr(struct rc
/* make sure all remaining data was flushed */

- /* back DE */
- rcar_dmac_chan_write(chan, RCAR_DMACHCR, chcr);
+ /* back DE if remain data exists */
+ if (rcar_dmac_chan_read(chan, RCAR_DMATCR))
+ rcar_dmac_chan_write(chan, RCAR_DMACHCR, chcr);

static void rcar_dmac_chan_halt(struct rcar_dmac_chan *chan)

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