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Subject[PATCH 4.4 01/60] x86/speculation/l1tf: Fix up pte->pfn conversion for PAE
4.4-stable review patch.  If anyone has any objections, please let me know.


From: Michal Hocko <>

commit e14d7dfb41f5807a0c1c26a13f2b8ef16af24935 upstream.

Jan has noticed that pte_pfn and co. resp. pfn_pte are incorrect for
CONFIG_PAE because phys_addr_t is wider than unsigned long and so the
pte_val reps. shift left would get truncated. Fix this up by using proper

[Just one chunk, again, needed here. Thanks to Ben and Guenter for
finding and fixing this. - gregkh]

Fixes: 6b28baca9b1f ("x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation")
Reported-by: Jan Beulich <>
Signed-off-by: Michal Hocko <>
Signed-off-by: Thomas Gleixner <>
Acked-by: Vlastimil Babka <>
Cc: Guenter Roeck <>
Cc: Ben Hutchings <>
Signed-off-by: Greg Kroah-Hartman <>

arch/x86/include/asm/pgtable.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

--- a/arch/x86/include/asm/pgtable.h
+++ b/arch/x86/include/asm/pgtable.h
@@ -385,7 +385,7 @@ static inline pmd_t pfn_pmd(unsigned lon

static inline pud_t pfn_pud(unsigned long page_nr, pgprot_t pgprot)
- phys_addr_t pfn = page_nr << PAGE_SHIFT;
+ phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT;
pfn ^= protnone_mask(pgprot_val(pgprot));
return __pud(pfn | massage_pgprot(pgprot));

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