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SubjectRE: [PATCH v2 1/3] dt-bindings: power: Add ZynqMP power domain bindings
Date
Hi Rob,

> -----Original Message-----
> From: Rob Herring [mailto:robh@kernel.org]
> Sent: Monday, August 20, 2018 12:46 PM
> To: Jolly Shah <JOLLYS@xilinx.com>
> Cc: matthias.bgg@gmail.com; andy.gross@linaro.org; shawnguo@kernel.org;
> geert+renesas@glider.be; bjorn.andersson@linaro.org;
> sean.wang@mediatek.com; m.szyprowski@samsung.com; Michal Simek
> <michals@xilinx.com>; mark.rutland@arm.com; Rajan Vaja
> <RAJANV@xilinx.com>; devicetree@vger.kernel.org; linux-arm-
> kernel@lists.infradead.org; linux-kernel@vger.kernel.org; Rajan Vaja
> <RAJANV@xilinx.com>; Jolly Shah <JOLLYS@xilinx.com>
> Subject: Re: [PATCH v2 1/3] dt-bindings: power: Add ZynqMP power domain
> bindings
>
> On Thu, Aug 16, 2018 at 12:21:42PM -0700, Jolly Shah wrote:
> > From: Rajan Vaja <rajan.vaja@xilinx.com>
> >
> > Add documentation to describe ZynqMP power domain bindings.
> >
> > Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
> > Signed-off-by: Jolly Shah <jollys@xilinx.com>
> > ---
> > .../firmware/xilinx/xlnx,zynqmp-firmware.txt | 47
> ++++++++++++++++++++++
>
> This should be with all the other power domain bindings.
>
> > 1 file changed, 47 insertions(+)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmwa
> > re.txt
> > b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmwa
> > re.txt
> > index d215d15..5fa10a0 100644
> > ---
> > a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmwa
> > re.txt
> > +++ b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-fi
> > +++ rmware.txt
> > @@ -64,6 +64,29 @@ Output clocks are registered based on clock
> > information received from firmware. Output clocks indexes are
> > mentioned in include/dt-bindings/clock/xlnx,zynqmp-clk.h.
> >
> > +-----------------------------------------------------------
> > +Device Tree Bindings for the Xilinx Zynq MPSoC PM domains
> > +-----------------------------------------------------------
> > +The binding for zynqmp-power-controller follow the common generic PM
> > +domain binding[1].
> > +
> > +[1] Documentation/devicetree/bindings/power/power_domain.txt
> > +
> > +== Zynq MPSoC Generic PM Domain Node ==
> > +
> > +Required properties:
> > + - compatible: Must be: "xlnx,zynqmp-power-controller"
> > +
> > +This node contains a number of subnodes, each representing a single
> > +PM domain that PM domain consumer devices reference.
> > +
> > +== PM Domain Nodes ==
> > +
> > +Required properties:
> > + - #power-domain-cells: Number of cells in a PM domain specifier. Must
> be 0.
> > + - pd-id: Domain identifier as defined by platform firmware.
> > + This identifier is passed to the PM firmware.
>
> Make this a cell for the power domain consumer.
[Jolly] We have more than one Ids for GPU device. Also they don't have parent child relationship and hence are defined as flat hierarchy. (shown in example below)

Thanks,
Jolly Shah

>
> > +
> > -------
> > Example
> > -------
> > @@ -78,5 +101,29 @@ firmware {
> > clocks = <&pss_ref_clk>, <&video_clk>,
> <&pss_alt_ref_clk>, <&aux_ref_clk>, <&gt_crx_ref_clk>;
> > clock-names = "pss_ref_clk", "video_clk",
> "pss_alt_ref_clk","aux_ref_clk", "gt_crx_ref_clk";
> > };
> > + zynqmp-power-controller {
> > + compatible = "xlnx,zynqmp-power-controller";
> > +
> > + pd_usb0: pd-usb0 {
> > + pd-id = <22>;
> > + #power-domain-cells = <0>;
> > + };
> > +
> > + pd_sata: pd-sata {
> > + pd-id = <28>;
> > + #power-domain-cells = <0>;
> > + };
> > +
> > + pd_gpu : pd-gpu {
> > + pd-id = <58 20 21>;
> > + #power-domain-cells = <0>;
> > + };
> > + };
> > };
> > };
> > +
> > +sata0: ahci@SATA_AHCI_HBA {
>
> Don't use defines in unit-addresses (or reg for that matter). It's pointless
> indirection.
>
> > + ...
> > + power-domains = <&pd_sata>;
> > + ...
> > +};
> > --
> > 2.7.4
> >

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