[lkml]   [2018]   [Aug]   [3]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
Messages in this thread
SubjectRe: [PATCH 09/11] RISC-V: Support per-hart timebase-frequency
On Thu, Aug 02, 2018 at 03:19:49PM -0700, Atish Patra wrote:
> On 8/2/18 4:50 AM, Christoph Hellwig wrote:
>> From: Palmer Dabbelt <>
>> Follow the updated DT specs and read the timebase-frequency from the
>> CPU 0 node.
> However, the DT in the HighFive Unleashed has the entry at the wrong place.
> Even the example in github also at wrong place.
> DT should be consistent between Documentation and the one in the hardware.
> I can fix them in bbl & submit a bbl patch. But I am not sure if that's an
> acceptable way to do it.

I'll need to have comments from Palmer and/or someone else at SiFive
here. Personally I really don't care where we document the timebase,
as this patch supports both locations anywhere. For now I'll just update
the commit log to state that more explicitly.

 \ /
  Last update: 2018-08-03 14:30    [W:0.075 / U:5.244 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site