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SubjectRe: [PATCH 02/14] dmaengine: dma-jz4780: Separate chan/ctrl registers
On 6 July 2018 at 03:15, Paul Cercueil <> wrote:
>> Paul,
>> On 3 July 2018 at 18:02, Paul Cercueil <> wrote:
>>> The register area of the JZ4780 DMA core can be split into different
>>> sections for different purposes:
>>> * one set of registers is used to perform actions at the DMA core level,
>>> that will generally affect all channels;
>>> * one set of registers per DMA channel, to perform actions at the DMA
>>> channel level, that will only affect the channel in question.
>>> The problem rises when trying to support new versions of the JZ47xx
>>> Ingenic SoC. For instance, the JZ4770 has two DMA cores, each one
>>> with six DMA channels, and the register sets are interleaved:
>>> <DMA0 chan regs> <DMA1 chan regs> <DMA0 ctrl regs> <DMA1 ctrl regs>
>>> By using one memory resource for the channel-specific registers and
>>> one memory resource for the core-specific registers, we can support
>>> the JZ4770, by initializing the driver once per DMA core with different
>>> addresses.
>> As per my understanding device tree should be modified only when
>> hardware changes. This looks the other way around. It must be possible
>> to achieve what you are trying to do in this patch without changing
>> the device tree.
> I would agree that devicetree has an ABI that we shouldn't break if
> possible.
> However DTS support for all the Ingenic SoCs/boards is far from being
> complete, and more importantly, all Ingenic-based boards compile the DTS
> file within the kernel; so breaking the ABI is not (yet) a problem, and
> we should push the big changes right now while it's still possible.

Completely agree with you in this. Let's wait and see what DT maintainer's view.

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