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SubjectRe: [PATCH V2 11/19] csky: Atomic operations
On Mon, Jul 02, 2018 at 01:30:14AM +0800, Guo Ren wrote:
> +#ifdef CONFIG_CPU_HAS_LDSTEX
> +ENTRY(csky_cmpxchg)
> + USPTOKSP
> + mfcr a3, epc
> + INCTRAP a3
> +
> + subi sp, 8
> + stw a3, (sp, 0)
> + mfcr a3, epsr
> + stw a3, (sp, 4)
> +
> + psrset ee
> +1:
> + ldex a3, (a2)
> + cmpne a0, a3
> + bt16 2f
> + mov a3, a1
> + stex a3, (a2)
> + bez a3, 1b
> +2:
> + sync.is
> + mvc a0
> + ldw a3, (sp, 0)
> + mtcr a3, epc
> + ldw a3, (sp, 4)
> + mtcr a3, epsr
> + addi sp, 8
> + KSPTOUSP
> + rte
> +END(csky_cmpxchg)
> +#else

Please explain... if the CPU has LDEX/STEX, then _why_ do you need this?

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