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SubjectRE: [PATCH v9 03/12] perf/x86/intel/pt: Add new bit definitions for Intel PT MSRs
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> > These bit definitions are use for emulate MSRs read/write for KVM. For
> > example, IA32_RTIT_CTL.FabricEn[bit 6] is available only when
> > CPUID.(EAX=14H, ECX=0):ECX[bit 3] = 1. If KVM guest try to set this
> > bit with CPUID.(EAX=14H, ECX=0):ECX[bit3] = 0 a #GP would be injected
> > to KVM guest.
>
> Do we have anything in the guest that this feature will work with?
>

It depend on PT driver. KVM need to do some security check if kvm guest (maybe linux or other os) try to set any bits of these MSRs.

Thanks,
Luwei Kang

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