[lkml]   [2018]   [Jun]   [7]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
Messages in this thread
SubjectRe: [PATCH v9 04/12] perf/x86/intel/pt: add new capability for Intel PT
On Tue, May 22, 2018 at 12:52:07PM +0800, Luwei Kang wrote:
> CPUID(EAX=14H,ECX=0):EBX[bit 3] = 1 indicates support of
> output to Trace Transport subsystem.
> MSR IA32_RTIT_CTL.FabricEn[bit 6] is reserved if
> CPUID.(EAX=14H, ECX=0):ECX[bit 3] = 0.

This should instead say:

This adds support for "output to Trace Transport subsystem" capability
of Intel PT, as documented in IA SDM Chapter 36.x.y.z. It means that
PT can output its trace to an MMIO address range rather than system
memory buffer.

> This is use for emulate IA32_RTIT_CTL MSR read/write
> in KVM. KVM guest write IA32_RTIT_CTL will trap to
> root mode and a #GP would be injected to guest if set
> IA32_RTIT_CTL.FabricEn with
> CPUID.(EAX=14H, ECX=0):ECX[bit 3] = 0.

I'm not sure what this means, this patch has nothing to do with KVM
as far as I can tell.

Aside from the commit message, this is a valid patch.


 \ /
  Last update: 2018-06-07 15:41    [W:0.267 / U:10.480 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site