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SubjectRe: [PATCH v3 18/24] drm/sun4i: DW HDMI PHY: Add support for second PLL
On Mon, Jun 25, 2018 at 8:02 PM, Jernej Skrabec <jernej.skrabec@siol.net> wrote:
> Some DW HDMI PHYs, like those found in A64 and R40 SoCs, can select
> between two clock parents.
>
> Add code which reads second PLL from DT.
>
> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>

This patch by itself does not do anything. It should be merged with the
next one.

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