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SubjectRe: [PATCH v5 1/7] clk: msm8996-gcc: Mark halt check as no-op for USB/PCIE pipe_clk

On Wed, May 2, 2018 at 2:06 PM, Manu Gautam <> wrote:
> The USB and PCIE pipe clocks are sourced from external clocks
> inside the QMP USB/PCIE PHYs. Enabling or disabling of PIPE RCG
> clocks is dependent on PHY initialization sequence hence
> update halt_check to BRANCH_HALT_SKIP for these clocks so
> that clock status bit is not polled when enabling or disabling
> the clocks. It allows to simplify PHY client driver code which
> is both user and source of the pipe_clk and avoid error logging
> related status check on clk_disable/enable.
> Signed-off-by: Manu Gautam <>
> ---
> drivers/clk/qcom/gcc-msm8996.c | 4 ++++
> 1 file changed, 4 insertions(+)

FWIW this matches my understanding of what Stephen and you agreed upon. Thus:

Reviewed-by: Douglas Anderson <>

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