[lkml]   [2018]   [May]   [3]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
Messages in this thread
SubjectRe: [PATCH v9 0/2] Initial Allwinner V3s CSI Support
Hi Yong,

On Tue, Mar 06, 2018 at 09:51:10AM +0800, Yong Deng wrote:
> This patchset add initial support for Allwinner V3s CSI.
> Allwinner V3s SoC features two CSI module. CSI0 is used for MIPI CSI-2
> interface and CSI1 is used for parallel interface. This is not
> documented in datasheet but by test and guess.
> This patchset implement a v4l2 framework driver and add a binding
> documentation for it.
> Currently, the driver only support the parallel interface. And has been
> tested with a BT1120 signal which generating from FPGA. The following
> fetures are not support with this patchset:
> - ISP
> - Master clock for camera sensor
> - Power regulator for the front end IC

Do you plan on sending another version some time soon? It would be
awesome to have this in 4.18.


Maxime Ripard, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering

 \ /
  Last update: 2018-05-03 19:14    [W:0.169 / U:2.348 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site