[lkml]   [2018]   [May]   [2]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
Messages in this thread
SubjectRe: [PATCH] gpio: zynq: Setup chip->base based on alias ID
On Wed, May 2, 2018 at 3:41 PM, Michal Simek <> wrote:

> If you don't want this patch I understand that and it will become just
> another soc vendor patch out of mainline.

I don't really know what to do, so that is why I'm discussing.

It's one of those gray areas.

From one point of view there is the purist stance that we should
only support what the mainline tree does, and be strict and
consistent so we don't accumulate to many nasty hacks.

On the other hand, it is completely possible that all users of this
particular driver actually must have this patch, and then I just
push them to use a deviant vendor tree for no good reason.

Would it be possible that I apply the patch, and somehow also
establish some understanding with all users of the Xilinx
platform that whatever legacy applications are out there
must start to migrate towards using the character device so
this reliance on the numberspace doesn't stick around forever?

For example can we make a patch to some systems like
adding proper GPIO line names to these device trees, such
as was made in e.g. commit f6b1674d570aa1
"arm64: dts: qcom: sbc: Name GPIO lines"

After all that is what I strive for as maintainer, as the IETF
motto says:
"rough consensus and running code"

Linus Walleij

 \ /
  Last update: 2018-05-02 15:56    [W:0.172 / U:1.408 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site