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SubjectRe: [PATCH 0/15] x86/split_lock: Enable #AC exception for split locked accesses
On 05/14/2018 11:52 AM, Fenghua Yu wrote:
> When executing an atomic instruction, sometimes the data access crosses
> the cache line boundary. This causes performance degradation. Intel
> introduces mechanism to detect such split lock issue via alignment check
> fault.

This is still a pretty sparse description.

Could you describe the performance degradation? Why is this not a
"doctor it hurts when I do that" situation?

Could you also give us *some* idea which CPUs this will show up on? Is
it a one-off feature, or will it be available widely?

> Since kernel doesn't know when SMI comes, it's impossible for kernel
> to disable split lock #AC before entering SMI. So SMI handler may
> inherit kernel's split lock setting and kernel tester may end up
> debug split lock issues in SMI.

What's a "kernel tester"?

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