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SubjectRe: [PATCH v4 11/15] memory: tegra: Add Tegra210 memory controller hot resets
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On 27.04.2018 12:39, Thierry Reding wrote:
> On Fri, Apr 13, 2018 at 02:33:50PM +0300, Dmitry Osipenko wrote:
>> From: Thierry Reding <treding@nvidia.com>
>>
>> Define the table of memory controller hot resets for Tegra210.
>>
>> Signed-off-by: Thierry Reding <treding@nvidia.com>
>> ---
>> drivers/memory/tegra/tegra210.c | 45 +++++++++++++++++++++++++++++++++
>> 1 file changed, 45 insertions(+)
>>
>> diff --git a/drivers/memory/tegra/tegra210.c b/drivers/memory/tegra/tegra210.c
>> index b729f49ffc8f..d00a77160407 100644
>> --- a/drivers/memory/tegra/tegra210.c
>> +++ b/drivers/memory/tegra/tegra210.c
>> @@ -1080,6 +1080,48 @@ static const struct tegra_smmu_soc tegra210_smmu_soc = {
>> .num_asids = 128,
>> };
>>
>> +#define TEGRA210_MC_RESET(_name, _control, _status, _bit) \
>> + { \
>> + .name = #_name, \
>> + .id = TEGRA210_MC_RESET_##_name, \
>> + .control = _control, \
>> + .status = _status, \
>> + .bit = _bit, \
>> + }
>> +
>> +static const struct tegra_mc_reset tegra210_mc_resets[] = {
>> + TEGRA210_MC_RESET(AFI, 0x200, 0x204, 0),
>> + TEGRA210_MC_RESET(AVPC, 0x200, 0x204, 1),
>> + TEGRA210_MC_RESET(DC, 0x200, 0x204, 2),
>> + TEGRA210_MC_RESET(DCB, 0x200, 0x204, 3),
>> + TEGRA210_MC_RESET(HC, 0x200, 0x204, 6),
>> + TEGRA210_MC_RESET(HDA, 0x200, 0x204, 7),
>> + TEGRA210_MC_RESET(ISP2, 0x200, 0x204, 8),
>> + TEGRA210_MC_RESET(MPCORE, 0x200, 0x204, 9),
>> + TEGRA210_MC_RESET(NVENC, 0x200, 0x204, 11),
>> + TEGRA210_MC_RESET(PPCS, 0x200, 0x204, 14),
>> + TEGRA210_MC_RESET(SATA, 0x200, 0x204, 15),
>> + TEGRA210_MC_RESET(VI, 0x200, 0x204, 17),
>> + TEGRA210_MC_RESET(VIC, 0x200, 0x204, 18),
>> + TEGRA210_MC_RESET(XUSB_HOST, 0x200, 0x204, 19),
>> + TEGRA210_MC_RESET(XUSB_DEV, 0x200, 0x204, 20),
>> + TEGRA210_MC_RESET(A9AVP, 0x200, 0x204, 21),
>> + TEGRA210_MC_RESET(TSEC, 0x200, 0x204, 22),
>> + TEGRA210_MC_RESET(SDMMC1, 0x200, 0x204, 29),
>> + TEGRA210_MC_RESET(SDMMC2, 0x200, 0x204, 30),
>> + TEGRA210_MC_RESET(SDMMC3, 0x200, 0x204, 31),
>> + TEGRA210_MC_RESET(SDMMC4, 0x970, 0x974, 0),
>> + TEGRA210_MC_RESET(ISP2B, 0x970, 0x974, 1),
>> + TEGRA210_MC_RESET(GPU, 0x970, 0x974, 2),
>> + TEGRA210_MC_RESET(NVDEC, 0x970, 0x974, 5),
>> + TEGRA210_MC_RESET(APE, 0x970, 0x974, 6),
>> + TEGRA210_MC_RESET(SE, 0x970, 0x974, 7),
>> + TEGRA210_MC_RESET(NVJPG, 0x970, 0x974, 8),
>> + TEGRA210_MC_RESET(AXIAP, 0x970, 0x974, 11),
>> + TEGRA210_MC_RESET(ETR, 0x970, 0x974, 12),
>> + TEGRA210_MC_RESET(TSECB, 0x970, 0x974, 13),
>> +};
>
> Isn't this missing an include for the definitions? There is an include
> for dt-bindings/memory/tegra20-mc.h for the Tegra20 driver, but none of
> the others have it.

Those drivers already have dt-bindings included.

> No need to respin, though, I can add that when applying.

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