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SubjectRe: Affinity for GIC irq line
> On 25/04/18 04:23, valmiki wrote:
>> Hi all,
>> When an IRQ line is set affinity using irq_set_affinity, which calls
>> irq_do_set_affinity, this API copies affinity mask to affinity variable
>> in irq_common_data of this irq descriptor.
> It does a wee bit more. Crucially, it contains the line:
> ret = chip->irq_set_affinity(data, mask, force);
Yes, i overlooked this part.
>> But as per ARM GICv2 document in order to drive a interrupt to a
>> specific CPU we need to program GICD_ITARGETSRn register.
>> But irq_set_affinity isn't writing to this register.Please correct me if
>> I'm wrong i did not find code for this register being updated in
>> irq_set_affinity flow.
>> So how affinity is being set for an IRQ line ?
> I would have though that a function name such as "gic_set_affinity" was
> clear enough?
>> If affinity was set successfully on what CPU does asm_do_IRQ run ?
> It runs on the CPU that the interrupt targets, I'd say.
Thanks Marc.
How does affinity for virtual irq work ?
For example pci-xgene-msi.c has xgene_msi_set_affinity function which
sets affinity for each virq.
As per arm64/boot/dts/apm/apm-storm.dtsi they use GICv2.
They are trying to map each virq to specific cpu but already GIC lines
affinity is set, when this affinity would be used ?

What does
/* Update MSI number to target the new CPU */
irqdata->hwirq = hwirq_to_canonical_hwirq(irqdata->hwirq) + target_cpu;

the above code do ?
Already mapping for hwirq to virq is done by this time for this domain.
Now if hwirq is updated its mapping doesn't it lead to wrong virq ?


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