lkml.org 
[lkml]   [2018]   [Mar]   [28]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: [PATCH 1/3] EDAC/amd64: Print ECC enabled/disabled for nodes with enabled MCs
On Wed, Mar 21, 2018 at 02:13:33PM -0500, Yazen Ghannam wrote:
> From: Yazen Ghannam <yazen.ghannam@amd.com>
>
> It's possible that a system can be used without any DRAM populated on
> one or more physical Dies on multi-die systems. Firmware will not
> enable DRAM ECC on Dies without DRAM. Users will then see a message
> about DRAM ECC disabled on those nodes without DRAM. However, DRAM ECC
> may, in fact, be enabled on the other Dies that have DRAM.
>
> Only print ECC enabled/disabled information for nodes that have at least
> one enabled memory channel.

So if the only reason for this is make the error messages more precise,
then let's not make it uglier than it is.

The right way to do it would be to push those checks down to
debug_display_dimm_sizes* which looks at the CS rows and the chip select
enable bits and there to differentiate between

* memory controller doesn't have DIMMs

and

* memory controller has DIMMs but ECC is disabled in the BIOS

and then print the respective informative error message. But not with a
yet another boolean which kinda takes care of F17h only and leaves the
old families as they were.

Thx.

--
Regards/Gruss,
Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.

\
 
 \ /
  Last update: 2018-03-28 15:01    [W:0.087 / U:5.052 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site