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Subject[PATCH 1/8] bindings: PCI: designware: Example update
Date
Changes the IP registers size to accommodate the ATU unroll space.

Replaces "ctrlreg" reg-name by "dbi" to be coherent with similar drivers.

Replaces the pcie base address example by a real pcie base address in use.

Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
---
Documentation/devicetree/bindings/pci/designware-pcie.txt | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt
index 1da7ade..6300762 100644
--- a/Documentation/devicetree/bindings/pci/designware-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt
@@ -1,7 +1,8 @@
* Synopsys DesignWare PCIe interface

Required properties:
-- compatible: should contain "snps,dw-pcie" to identify the core.
+- compatible:
+ "snps,dw-pcie" for RC mode;
- reg: Should contain the configuration address space.
- reg-names: Must be "config" for the PCIe configuration space.
(The old way of getting the configuration address space from "ranges"
@@ -41,11 +42,11 @@ EP mode:

Example configuration:

- pcie: pcie@dffff000 {
+ pcie: pcie@dfc00000 {
compatible = "snps,dw-pcie";
- reg = <0xdffff000 0x1000>, /* Controller registers */
- <0xd0000000 0x2000>; /* PCI config space */
- reg-names = "ctrlreg", "config";
+ reg = <0xdfc00000 0x302000>, /* IP registers */
+ <0xd0000000 0x002000>; /* Configuration space */
+ reg-names = "dbi", "config";
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
@@ -54,5 +55,4 @@ Example configuration:
interrupts = <25>, <24>;
#interrupt-cells = <1>;
num-lanes = <1>;
- num-viewport = <3>;
};
--
2.7.4

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