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Subject[PATCH v6 1/2] arm64: Implement page table free interfaces
Date
Implement pud_free_pmd_page() and pmd_free_pte_page().

Implementation requires,
1) Clearing off the current pud/pmd entry
2) Invalidate TLB which could have previously
valid but not stale entry
3) Freeing of the un-used next level page tables

Signed-off-by: Chintan Pandya <cpandya@codeaurora.org>
---
From V5->V6:
- Removed extra bool parameter 'tlb_inv'
- Doing pmd/pud TLB invalidation with __flush_tlb_kernel_pgtable()

arch/arm64/mm/mmu.c | 29 +++++++++++++++++++++++++----
1 file changed, 25 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
index da98828..0f651db 100644
--- a/arch/arm64/mm/mmu.c
+++ b/arch/arm64/mm/mmu.c
@@ -45,6 +45,7 @@
#include <asm/memblock.h>
#include <asm/mmu_context.h>
#include <asm/ptdump.h>
+#include <asm/tlbflush.h>

#define NO_BLOCK_MAPPINGS BIT(0)
#define NO_CONT_MAPPINGS BIT(1)
@@ -973,12 +974,32 @@ int pmd_clear_huge(pmd_t *pmdp)
return 1;
}

-int pud_free_pmd_page(pud_t *pud, unsigned long addr)
+int pmd_free_pte_page(pmd_t *pmdp, unsigned long addr)
{
- return pud_none(*pud);
+ pmd_t *table;
+
+ if (pmd_present(READ_ONCE(*pmdp))) {
+ table = __va(pmd_val(*pmdp));
+ pmd_clear(pmdp);
+ __flush_tlb_kernel_pgtable(addr);
+ free_page((unsigned long) table);
+ }
+ return 1;
}

-int pmd_free_pte_page(pmd_t *pmd, unsigned long addr)
+int pud_free_pmd_page(pud_t *pudp, unsigned long addr)
{
- return pmd_none(*pmd);
+ pmd_t *table;
+ int i;
+
+ if (pud_present(READ_ONCE(*pudp))) {
+ table = __va(pud_val(*pudp));
+ for (i = 0; i < PTRS_PER_PMD; i++)
+ pmd_free_pte_page(&table[i], addr + (i * PMD_SIZE));
+
+ pud_clear(pudp);
+ __flush_tlb_kernel_pgtable(addr);
+ free_page((unsigned long) table);
+ }
+ return 1;
}
--
Qualcomm India Private Limited, on behalf of Qualcomm Innovation
Center, Inc., is a member of Code Aurora Forum, a Linux Foundation
Collaborative Project
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