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SubjectRe: [PATCH v3 01/15] dt-bindings: clock: mediatek: add missing required #reset-cells
Date
Quoting sean.wang@mediatek.com (2018-02-17 11:54:36)
> From: Sean Wang <sean.wang@mediatek.com>
>
> All ethsys, pciesys and ssusbsys internally include reset controller, so
> explicitly add back these missing cell definitions to related bindings
> and examples.
>
> Signed-off-by: Sean Wang <sean.wang@mediatek.com>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Michael Turquette <mturquette@baylibre.com>
> Cc: Stephen Boyd <sboyd@codeaurora.org>
> Cc: linux-clk@vger.kernel.org
> Reviewed-by: Rob Herring <robh@kernel.org>
> ---

Acked-by: Stephen Boyd <sboyd@kernel.org>

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