lkml.org 
[lkml]   [2018]   [Mar]   [12]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: [tip:x86/mm] x86/boot/compressed/64: Describe the logic behind the LA57 check
On Mon, Mar 12, 2018 at 01:40:27PM +0100, Peter Zijlstra wrote:
> On Mon, Mar 12, 2018 at 02:27:58AM -0700, tip-bot for Kirill A. Shutemov wrote:
> > + /*
> > + * Check if LA57 is desired and supported.
> > + *
> > + * There are two parts to the check:
> > + * - if the kernel supports 5-level paging: CONFIG_X86_5LEVEL=y
> > + * - if the machine supports 5-level paging:
> > + * + CPUID leaf 7 is supported
> > + * + the leaf has the feature bit set
> > + *
> > + * That's substitute for boot_cpu_has() in early boot code.
> > + */
> > + if (IS_ENABLED(CONFIG_X86_5LEVEL) &&
> > + native_cpuid_eax(0) >= 7 &&
> > + (native_cpuid_ecx(7) & (1 << (X86_FEATURE_LA57 & 31)))) {
> > paging_config.l5_required = 1;
> > + }
>
> Should this not also include something like: machine actually has
> suffient memory for it to make sense to use l5 ?

Define "suffient". :)

The amount of physical memory is not the only reason to have 5-level
paging enabled. You may need 5-level paging to get access to wider virtual
address space to map something not backed by local physical memory
(consider RDMA).

--
Kirill A. Shutemov

\
 
 \ /
  Last update: 2018-03-12 13:44    [W:0.046 / U:1.084 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site