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SubjectRe: [PATCH v3] iommu/amd: Add support for fast IOTLB flushing
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Hi Joerg,

On 2/13/18 8:29 PM, Joerg Roedel wrote:
> Hi Suravee,
>
> thanks for working on this.
>
> On Wed, Jan 31, 2018 at 12:01:14AM -0500, Suravee Suthikulpanit wrote:
>> +static void amd_iommu_iotlb_range_add(struct iommu_domain *domain,
>> + unsigned long iova, size_t size)
>> +{
>> + struct amd_iommu_flush_entries *entry, *p;
>> + unsigned long flags;
>> + bool found = false;
>> +
>> + spin_lock_irqsave(&amd_iommu_flush_list_lock, flags);
>
> I am not happy with introducing or using global locks when they are not
> necessary. Can this be a per-domain lock?
>
> Besides, did you check it makes sense to actually keep track of the
> ranges here? My approach would be to just make iotlb_range_add() an noop
> and do a full domain flush in iotlb_sync(). But maybe you did
> measurements you can share here to show there is a benefit.
>
>
>
> Joerg
>

Alright, I'll send out v4 w/ iotlb_range_add() as no-op, and iotlb_sync()
as full domain flush. This should be sufficient to get start with adopting
the fast TLB flushing interface.

I'll submit support for fine-grain TLB invalidation as a separate series.

Thanks,
Suravee

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