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SubjectRe: [PATCH v11 03/10] sparc64: Add support for ADI register fields, ASIs and traps
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From: Joe Perches <joe@perches.com>
Date: Thu, 01 Feb 2018 12:32:02 -0800

>> diff --git a/arch/sparc/include/asm/ttable.h b/arch/sparc/include/asm/ttable.h
> []
>> @@ -219,6 +219,16 @@
>> nop; \
>> nop;
>>
>> +#define SUN4V_MCD_PRECISE \
>> + ldxa [%g0] ASI_SCRATCHPAD, %g2; \
>> + ldx [%g2 + HV_FAULT_D_ADDR_OFFSET], %g4; \
>> + ldx [%g2 + HV_FAULT_D_CTX_OFFSET], %g5; \
>> + ba,pt %xcc, etrap; \
>> + rd %pc, %g7; \
>> + ba,pt %xcc, sun4v_mcd_detect_precise; \
>> + nop; \
>> + nop;
>
> and here and elsewhere.

Joe, this is intentional in Sparc assembler.

Branches on sparc have delay slots, and this is annotated by indenting
the delay slot instruction one space more than the branch preceeding
it.

Please make more constructive review comments than whitespace as these
patches have been under review for more than half a year.

Thank you very much.

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