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SubjectRE: [PATCH v2 5/5] usb:cdns3 Add Cadence USB3 DRD Driver
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Hi Peter,
>
>> >
>> >@@ -299,6 +306,7 @@ int cdns3_drd_init(struct cdns3 *cdns)
>> > cdns->version = CDNS3_CONTROLLER_V0;
>> > cdns->otg_v1_regs = NULL;
>> > cdns->otg_regs = regs;
>> >+ writel(0x1, &cdns->otg_v0_regs->simulate);
>> > dev_info(cdns->dev, "DRD version v0 (%08x)\n",
>> > readl(&cdns->otg_v0_regs->version));
>> > } else {
>>
>> I have confirmation from HW team that time that driver should wait after de-
>> selecting mode is 2-3ms for simulate mode. It's time when FSM is in
>> DRD_H_WAIT_VBUS_FAIL.
>> Driver cannot re-enable the host/device mode before this time has elapsed.
>>
>> 3 ms is the maximum time. Additionally, you can confirm the current FSM state by
>> reading the host_otg_state (bit 5:3) or dev_otg_state (2:0) from OTGSTATE
>> register.
>>
>> If bit 0 in simulate register is cleared the time is exactly 1s.
>>
>
>Thanks, Pawel.
>
>Would you please add below changes in your next revision?
>- Set bit 0 in simulate register
But it's used only for simulation environments to speed up simulation.
On real platforms this bit should be cleared. I'm not sure if I can
add some code related to simulation environment to driver.
If yes then I must introduce the way, that allow to recognize this two modes.
I could add module parameter or add additional config in Kconfig file.

>- timeout logic for waiting host_otg_state or dev_otg_state at OTGSTATE
>when switch to host or device.

I will add such code.

Pawel

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