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SubjectRe: [PATCH v3 5/9] drm/komeda: Add komeda_format_caps for format handling
On Fri, Dec 21, 2018 at 10:00:01AM +0000, james qian wang (Arm Technology China) wrote:
> komeda_format_caps is for describing ARM display specific features and
> limitations of a specific format, and format_caps will be linked into
> &komeda_framebuffer like a extension of &drm_format_info.
> And komed_format_caps_table will be initialized before the enum_resources,
> since the layer features description depend on this format_caps table, so
> we'd better initialize the table first.
>
> Changes in v3:
> - Fixed style problem found by checkpatch.pl --strict.
>
> Signed-off-by: James (Qian) Wang <james.qian.wang@arm.com>

Acked-by: Liviu Dudau <liviu.dudau@arm.com>

Best regards,
Liviu

> ---
> drivers/gpu/drm/arm/display/komeda/Makefile | 1 +
> .../gpu/drm/arm/display/komeda/d71/d71_dev.c | 78 ++++++++++++++++
> .../gpu/drm/arm/display/komeda/komeda_dev.c | 2 +
> .../gpu/drm/arm/display/komeda/komeda_dev.h | 11 ++-
> .../arm/display/komeda/komeda_format_caps.c | 75 ++++++++++++++++
> .../arm/display/komeda/komeda_format_caps.h | 89 +++++++++++++++++++
> .../drm/arm/display/komeda/komeda_pipeline.h | 1 +
> 7 files changed, 256 insertions(+), 1 deletion(-)
> create mode 100644 drivers/gpu/drm/arm/display/komeda/komeda_format_caps.c
> create mode 100644 drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h
>
> diff --git a/drivers/gpu/drm/arm/display/komeda/Makefile b/drivers/gpu/drm/arm/display/komeda/Makefile
> index c03d6876ef75..394fc2aa434a 100644
> --- a/drivers/gpu/drm/arm/display/komeda/Makefile
> +++ b/drivers/gpu/drm/arm/display/komeda/Makefile
> @@ -7,6 +7,7 @@ ccflags-y := \
> komeda-y := \
> komeda_drv.o \
> komeda_dev.o \
> + komeda_format_caps.o \
> komeda_pipeline.o
>
> komeda-y += \
> diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
> index af3dabb499cd..edbf9daa1545 100644
> --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
> +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
> @@ -13,7 +13,85 @@ static int d71_enum_resources(struct komeda_dev *mdev)
> return -1;
> }
>
> +#define __HW_ID(__group, __format) \
> + ((((__group) & 0x7) << 3) | ((__format) & 0x7))
> +
> +#define RICH KOMEDA_FMT_RICH_LAYER
> +#define SIMPLE KOMEDA_FMT_SIMPLE_LAYER
> +#define RICH_SIMPLE (KOMEDA_FMT_RICH_LAYER | KOMEDA_FMT_SIMPLE_LAYER)
> +#define RICH_WB (KOMEDA_FMT_RICH_LAYER | KOMEDA_FMT_WB_LAYER)
> +#define RICH_SIMPLE_WB (RICH_SIMPLE | KOMEDA_FMT_WB_LAYER)
> +
> +#define Rot_0 DRM_MODE_ROTATE_0
> +#define Flip_H_V (DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y | Rot_0)
> +#define Rot_ALL_H_V (DRM_MODE_ROTATE_MASK | Flip_H_V)
> +
> +#define LYT_NM BIT(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16)
> +#define LYT_WB BIT(AFBC_FORMAT_MOD_BLOCK_SIZE_32x8)
> +#define LYT_NM_WB (LYT_NM | LYT_WB)
> +
> +#define AFB_TH AFBC(_TILED | _SPARSE)
> +#define AFB_TH_SC_YTR AFBC(_TILED | _SC | _SPARSE | _YTR)
> +#define AFB_TH_SC_YTR_BS AFBC(_TILED | _SC | _SPARSE | _YTR | _SPLIT)
> +
> +static struct komeda_format_caps d71_format_caps_table[] = {
> + /* HW_ID | fourcc | tile_sz | layer_types | rots | afbc_layouts | afbc_features */
> + /* ABGR_2101010*/
> + {__HW_ID(0, 0), DRM_FORMAT_ARGB2101010, 1, RICH_SIMPLE_WB, Flip_H_V, 0, 0},
> + {__HW_ID(0, 1), DRM_FORMAT_ABGR2101010, 1, RICH_SIMPLE_WB, Flip_H_V, 0, 0},
> + {__HW_ID(0, 1), DRM_FORMAT_ABGR2101010, 1, RICH_SIMPLE, Rot_ALL_H_V, LYT_NM_WB, AFB_TH_SC_YTR_BS}, /* afbc */
> + {__HW_ID(0, 2), DRM_FORMAT_RGBA1010102, 1, RICH_SIMPLE_WB, Flip_H_V, 0, 0},
> + {__HW_ID(0, 3), DRM_FORMAT_BGRA1010102, 1, RICH_SIMPLE_WB, Flip_H_V, 0, 0},
> + /* ABGR_8888*/
> + {__HW_ID(1, 0), DRM_FORMAT_ARGB8888, 1, RICH_SIMPLE_WB, Flip_H_V, 0, 0},
> + {__HW_ID(1, 1), DRM_FORMAT_ABGR8888, 1, RICH_SIMPLE_WB, Flip_H_V, 0, 0},
> + {__HW_ID(1, 1), DRM_FORMAT_ABGR8888, 1, RICH_SIMPLE, Rot_ALL_H_V, LYT_NM_WB, AFB_TH_SC_YTR_BS}, /* afbc */
> + {__HW_ID(1, 2), DRM_FORMAT_RGBA8888, 1, RICH_SIMPLE_WB, Flip_H_V, 0, 0},
> + {__HW_ID(1, 3), DRM_FORMAT_BGRA8888, 1, RICH_SIMPLE_WB, Flip_H_V, 0, 0},
> + /* XBGB_8888 */
> + {__HW_ID(2, 0), DRM_FORMAT_XRGB8888, 1, RICH_SIMPLE_WB, Flip_H_V, 0, 0},
> + {__HW_ID(2, 1), DRM_FORMAT_XBGR8888, 1, RICH_SIMPLE_WB, Flip_H_V, 0, 0},
> + {__HW_ID(2, 2), DRM_FORMAT_RGBX8888, 1, RICH_SIMPLE_WB, Flip_H_V, 0, 0},
> + {__HW_ID(2, 3), DRM_FORMAT_BGRX8888, 1, RICH_SIMPLE_WB, Flip_H_V, 0, 0},
> + /* BGR_888 */ /* none-afbc RGB888 doesn't support rotation and flip */
> + {__HW_ID(3, 0), DRM_FORMAT_RGB888, 1, RICH_SIMPLE_WB, Rot_0, 0, 0},
> + {__HW_ID(3, 1), DRM_FORMAT_BGR888, 1, RICH_SIMPLE_WB, Rot_0, 0, 0},
> + {__HW_ID(3, 1), DRM_FORMAT_BGR888, 1, RICH_SIMPLE, Rot_ALL_H_V, LYT_NM_WB, AFB_TH_SC_YTR_BS}, /* afbc */
> + /* BGR 16bpp */
> + {__HW_ID(4, 0), DRM_FORMAT_RGBA5551, 1, RICH_SIMPLE, Flip_H_V, 0, 0},
> + {__HW_ID(4, 1), DRM_FORMAT_ABGR1555, 1, RICH_SIMPLE, Flip_H_V, 0, 0},
> + {__HW_ID(4, 1), DRM_FORMAT_ABGR1555, 1, RICH_SIMPLE, Rot_ALL_H_V, LYT_NM_WB, AFB_TH_SC_YTR}, /* afbc */
> + {__HW_ID(4, 2), DRM_FORMAT_RGB565, 1, RICH_SIMPLE, Flip_H_V, 0, 0},
> + {__HW_ID(4, 3), DRM_FORMAT_BGR565, 1, RICH_SIMPLE, Flip_H_V, 0, 0},
> + {__HW_ID(4, 3), DRM_FORMAT_BGR565, 1, RICH_SIMPLE, Rot_ALL_H_V, LYT_NM_WB, AFB_TH_SC_YTR}, /* afbc */
> + {__HW_ID(4, 4), DRM_FORMAT_R8, 1, SIMPLE, Rot_0, 0, 0},
> + /* YUV 444/422/420 8bit */
> + {__HW_ID(5, 0), 0 /*XYUV8888*/, 1, 0, 0, 0, 0},
> + /* XYUV unsupported*/
> + {__HW_ID(5, 1), DRM_FORMAT_YUYV, 1, RICH, Rot_ALL_H_V, LYT_NM, AFB_TH}, /* afbc */
> + {__HW_ID(5, 2), DRM_FORMAT_YUYV, 1, RICH, Flip_H_V, 0, 0},
> + {__HW_ID(5, 3), DRM_FORMAT_UYVY, 1, RICH, Flip_H_V, 0, 0},
> + {__HW_ID(5, 4), 0, /*X0L0 */ 2, 0, 0, 0}, /* Y0L0 unsupported */
> + {__HW_ID(5, 6), DRM_FORMAT_NV12, 1, RICH, Flip_H_V, 0, 0},
> + {__HW_ID(5, 6), 0/*DRM_FORMAT_YUV420_8BIT*/, 1, RICH, Rot_ALL_H_V, LYT_NM, AFB_TH}, /* afbc */
> + {__HW_ID(5, 7), DRM_FORMAT_YUV420, 1, RICH, Flip_H_V, 0, 0},
> + /* YUV 10bit*/
> + {__HW_ID(6, 0), 0,/*XVYU2101010*/ 1, 0, 0, 0, 0},/* VYV30 unsupported */
> + {__HW_ID(6, 6), 0/*DRM_FORMAT_X0L2*/, 2, RICH, Flip_H_V, 0, 0},
> + {__HW_ID(6, 7), 0/*DRM_FORMAT_P010*/, 1, RICH, Flip_H_V, 0, 0},
> + {__HW_ID(6, 7), 0/*DRM_FORMAT_YUV420_10BIT*/, 1, RICH, Rot_ALL_H_V, LYT_NM, AFB_TH},
> +};
> +
> +static void d71_init_fmt_tbl(struct komeda_dev *mdev)
> +{
> + struct komeda_format_caps_table *table = &mdev->fmt_tbl;
> +
> + table->format_caps = d71_format_caps_table;
> + table->n_formats = ARRAY_SIZE(d71_format_caps_table);
> +}
> +
> static struct komeda_dev_funcs d71_chip_funcs = {
> + .init_format_table = d71_init_fmt_tbl,
> .enum_resources = d71_enum_resources,
> .cleanup = NULL,
> };
> diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_dev.c b/drivers/gpu/drm/arm/display/komeda/komeda_dev.c
> index d0cc4f758077..2f8f4685eb62 100644
> --- a/drivers/gpu/drm/arm/display/komeda/komeda_dev.c
> +++ b/drivers/gpu/drm/arm/display/komeda/komeda_dev.c
> @@ -138,6 +138,8 @@ struct komeda_dev *komeda_dev_create(struct device *dev)
> MALIDP_CORE_ID_MAJOR(mdev->chip.core_id),
> MALIDP_CORE_ID_MINOR(mdev->chip.core_id));
>
> + mdev->funcs->init_format_table(mdev);
> +
> err = mdev->funcs->enum_resources(mdev);
> if (err) {
> DRM_ERROR("enumerate display resource failed.\n");
> diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_dev.h b/drivers/gpu/drm/arm/display/komeda/komeda_dev.h
> index 4a27a44e2ec6..555510be66f1 100644
> --- a/drivers/gpu/drm/arm/display/komeda/komeda_dev.h
> +++ b/drivers/gpu/drm/arm/display/komeda/komeda_dev.h
> @@ -11,6 +11,7 @@
> #include <linux/interrupt.h>
> #include "komeda_pipeline.h"
> #include "malidp_product.h"
> +#include "komeda_format_caps.h"
>
> /* malidp device id */
> enum {
> @@ -44,6 +45,13 @@ struct komeda_dev;
> * Supplied by chip level and returned by the chip entry function xxx_identify,
> */
> struct komeda_dev_funcs {
> + /**
> + * @init_format_table:
> + *
> + * initialize &komeda_dev->format_table, this function should be called
> + * before the &enum_resource
> + */
> + void (*init_format_table)(struct komeda_dev *mdev);
> /**
> * @enum_resources:
> *
> @@ -66,7 +74,8 @@ struct komeda_dev {
> u32 __iomem *reg_base;
>
> struct komeda_chip_info chip;
> -
> + /** @fmt_tbl: initialized by &komeda_dev_funcs->init_format_table */
> + struct komeda_format_caps_table fmt_tbl;
> /** @pclk: APB clock for register access */
> struct clk *pclk;
> /** @mck: HW main engine clk */
> diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.c b/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.c
> new file mode 100644
> index 000000000000..1e17bd6107a4
> --- /dev/null
> +++ b/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.c
> @@ -0,0 +1,75 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * (C) COPYRIGHT 2018 ARM Limited. All rights reserved.
> + * Author: James.Qian.Wang <james.qian.wang@arm.com>
> + *
> + */
> +
> +#include <linux/slab.h>
> +#include "komeda_format_caps.h"
> +#include "malidp_utils.h"
> +
> +const struct komeda_format_caps *
> +komeda_get_format_caps(struct komeda_format_caps_table *table,
> + u32 fourcc, u64 modifier)
> +{
> + const struct komeda_format_caps *caps;
> + u64 afbc_features = modifier & ~(AFBC_FORMAT_MOD_BLOCK_SIZE_MASK);
> + u32 afbc_layout = modifier & AFBC_FORMAT_MOD_BLOCK_SIZE_MASK;
> + int id;
> +
> + for (id = 0; id < table->n_formats; id++) {
> + caps = &table->format_caps[id];
> +
> + if (fourcc != caps->fourcc)
> + continue;
> +
> + if ((modifier == 0ULL) && (caps->supported_afbc_layouts == 0))
> + return caps;
> +
> + if (has_bits(afbc_features, caps->supported_afbc_features) &&
> + has_bit(afbc_layout, caps->supported_afbc_layouts))
> + return caps;
> + }
> +
> + return NULL;
> +}
> +
> +u32 *komeda_get_layer_fourcc_list(struct komeda_format_caps_table *table,
> + u32 layer_type, u32 *n_fmts)
> +{
> + const struct komeda_format_caps *cap;
> + u32 *fmts;
> + int i, j, n = 0;
> +
> + fmts = kcalloc(table->n_formats, sizeof(u32), GFP_KERNEL);
> + if (!fmts)
> + return NULL;
> +
> + for (i = 0; i < table->n_formats; i++) {
> + cap = &table->format_caps[i];
> + if (!(layer_type & cap->supported_layer_types) ||
> + (cap->fourcc == 0))
> + continue;
> +
> + /* one fourcc may has two caps items in table (afbc/none-afbc),
> + * so check the existing list to avoid adding a duplicated one.
> + */
> + for (j = n - 1; j >= 0; j--)
> + if (fmts[j] == cap->fourcc)
> + break;
> +
> + if (j < 0)
> + fmts[n++] = cap->fourcc;
> + }
> +
> + if (n_fmts)
> + *n_fmts = n;
> +
> + return fmts;
> +}
> +
> +void komeda_put_fourcc_list(u32 *fourcc_list)
> +{
> + kfree(fourcc_list);
> +}
> diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h b/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h
> new file mode 100644
> index 000000000000..60f39e77b098
> --- /dev/null
> +++ b/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h
> @@ -0,0 +1,89 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * (C) COPYRIGHT 2018 ARM Limited. All rights reserved.
> + * Author: James.Qian.Wang <james.qian.wang@arm.com>
> + *
> + */
> +
> +#ifndef _KOMEDA_FORMAT_CAPS_H_
> +#define _KOMEDA_FORMAT_CAPS_H_
> +
> +#include <linux/types.h>
> +#include <uapi/drm/drm_fourcc.h>
> +#include <drm/drm_fourcc.h>
> +
> +#define AFBC(x) DRM_FORMAT_MOD_ARM_AFBC(x)
> +
> +/* afbc layerout */
> +#define AFBC_16x16(x) AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 | (x))
> +#define AFBC_32x8(x) AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_32x8 | (x))
> +
> +/* afbc features */
> +#define _YTR AFBC_FORMAT_MOD_YTR
> +#define _SPLIT AFBC_FORMAT_MOD_SPLIT
> +#define _SPARSE AFBC_FORMAT_MOD_SPARSE
> +#define _CBR AFBC_FORMAT_MOD_CBR
> +#define _TILED AFBC_FORMAT_MOD_TILED
> +#define _SC AFBC_FORMAT_MOD_SC
> +
> +/* layer_type */
> +#define KOMEDA_FMT_RICH_LAYER BIT(0)
> +#define KOMEDA_FMT_SIMPLE_LAYER BIT(1)
> +#define KOMEDA_FMT_WB_LAYER BIT(2)
> +
> +#define AFBC_TH_LAYOUT_ALIGNMENT 8
> +#define AFBC_HEADER_SIZE 16
> +#define AFBC_SUPERBLK_ALIGNMENT 128
> +#define AFBC_SUPERBLK_PIXELS 256
> +#define AFBC_BODY_START_ALIGNMENT 1024
> +#define AFBC_TH_BODY_START_ALIGNMENT 4096
> +
> +/**
> + * struct komeda_format_caps
> + *
> + * komeda_format_caps is for describing ARM display specific features and
> + * limitations for a specific format, and format_caps will be linked into
> + * &komeda_framebuffer like a extension of &drm_format_info.
> + *
> + * NOTE: one fourcc may has two different format_caps items for fourcc and
> + * fourcc+modifier
> + *
> + * @hw_id: hw format id, hw specific value.
> + * @fourcc: drm fourcc format.
> + * @tile_size: format tiled size, used by ARM format X0L0/X0L2
> + * @supported_layer_types: indicate which layer supports this format
> + * @supported_rots: allowed rotations for this format
> + * @supported_afbc_layouts: supported afbc layerout
> + * @supported_afbc_features: supported afbc features
> + */
> +struct komeda_format_caps {
> + u32 hw_id;
> + u32 fourcc;
> + u32 tile_size;
> + u32 supported_layer_types;
> + u32 supported_rots;
> + u32 supported_afbc_layouts;
> + u64 supported_afbc_features;
> +};
> +
> +/**
> + * struct komeda_format_caps_table - format_caps mananger
> + *
> + * @n_formats: the size of format_caps list.
> + * @format_caps: format_caps list.
> + */
> +struct komeda_format_caps_table {
> + u32 n_formats;
> + const struct komeda_format_caps *format_caps;
> +};
> +
> +const struct komeda_format_caps *
> +komeda_get_format_caps(struct komeda_format_caps_table *table,
> + u32 fourcc, u64 modifier);
> +
> +u32 *komeda_get_layer_fourcc_list(struct komeda_format_caps_table *table,
> + u32 layer_type, u32 *n_fmts);
> +
> +void komeda_put_fourcc_list(u32 *fourcc_list);
> +
> +#endif
> diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h
> index d1e0c1140273..2d68ffeae25d 100644
> --- a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h
> +++ b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline.h
> @@ -213,6 +213,7 @@ static inline u16 component_changed_inputs(struct komeda_component_state *st)
> struct komeda_layer {
> struct komeda_component base;
> /* layer specific features and caps */
> + int layer_type; /* RICH, SIMPLE or WB */
> };
>
> struct komeda_layer_state {
> --
> 2.17.1
>

--
====================
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| but they're not |
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