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SubjectRE: [PATCH v4 06/12] iommu/vt-d: Add second level page table interface
Date
Hi,

> From: Lu Baolu [mailto:baolu.lu@linux.intel.com]
> Sent: Thursday, November 8, 2018 10:28 AM
> Subject: Re: [PATCH v4 06/12] iommu/vt-d: Add second level page table interface
>
> Hi,
>
> On 11/7/18 3:13 PM, Liu, Yi L wrote:
> > Hi Baolu,
> >
> >> From: Lu Baolu [mailto:baolu.lu@linux.intel.com]
> >> Sent: Monday, November 5, 2018 1:32 PM
> >>
> >> This adds the interfaces to setup or tear down the structures for
> >> second level page table translations. This includes types of second
> >> level only translation and pass through.
> >
> > A little bit refining to the description:) "This patch adds interfaces
> > for setup or tear down second level translation in PASID granularity.
> > Translation type includes second level only type and pass-through
> > type."
> >
> >> Cc: Ashok Raj <ashok.raj@intel.com>
> >> Cc: Jacob Pan <jacob.jun.pan@linux.intel.com>
> >> Cc: Kevin Tian <kevin.tian@intel.com>
> >> Cc: Liu Yi L <yi.l.liu@intel.com>
> >> Signed-off-by: Sanjay Kumar <sanjay.k.kumar@intel.com>
> >
> > [...]
> >
> >> +
> >> +void intel_pasid_tear_down_entry(struct intel_iommu *iommu,
> >> + struct device *dev, int pasid)
> >> +{
> >> + struct pasid_entry *pte;
> >
> > pte is confusing as it is similar with pte in paging structures. may
> > use pt_entry or just pasid_entry. This comment applies to other "pte"s
> > in this patch.
>
> "pte" in this file means "pasid table entry", not "page table entry".
> This file holds code to handle pasid table related staff. It has nothing to do with
> paging structure. I think there should be no confusion here.
> :-)

I see. Then up to you. :) It's just my feeling when reading the patch, it leads me to
believe it is paging structure.

Regards,
Yi Liu
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