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Subject[PATCH v2 0/4] Update DF/SMN access and k10temp for AMD F17h M30h
Date
Updates the data fabric/system management network code needed to get
k10temp working for M30h. Since there are now processors which have
multiple roots per DF/SMN interface, there needs to some logic which
skips N-1 root complexes per DF/SMN interface. This is because the root
complexes per interface are redundant (as far as DF/SMN goes). These
changes shouldn't effect past processors and, for F17h M0Xh, the
mappings stay the same.

v1 -> v2:
* patch 3 & 4: add M30_DF_F3 straight to pci_ids.h to reduce churn
* patch 2:
- update commit msg and comment to explain root selection further
- move return if !misc_count under where misc_count is calculated

Brian Woods (4):
k10temp: x86/amd_nb: consolidate shared device IDs
x86/amd_nb: add support for newer PCI topologies
x86/amd_nb: add PCI device IDs for F17h M30h
hwmon: k10temp: add support for AMD F17h M30h CPUs

arch/x86/kernel/amd_nb.c | 53 ++++++++++++++++++++++++++++++++++++++++--------
drivers/hwmon/k10temp.c | 10 ++-------
include/linux/pci_ids.h | 3 +++
3 files changed, 50 insertions(+), 16 deletions(-)

--
2.11.0

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