lkml.org 
[lkml]   [2018]   [Nov]   [6]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
SubjectRe: [PATCH AUTOSEL 4.19 28/57] watchdog: lantiq: update register names to better match spec
From
Date
On 11/04/2018 02:51 PM, Sasha Levin wrote:
> From: Hauke Mehrtens <hauke@hauke-m.de>
>
> [ Upstream commit 1f59f8aff98f200af7a6882184add7b85f5da741 ]
>
> Some of the names of the bits were confusing to me.
> Now the bits share the same prefix as the register they are set on.
>
> The LTQ_WDT_CR_PWL register (bits 26:25) is the pre warning limit and it
> does not turn anything on. It has 4 possible divers 1/2, 1/4, 1/8 and
> 1/16, this drivers only uses 1/16.
> The LTQ_WDT_CR_CLKDIV register bits(25:24) is only configuring a clock
> divers and do not turn any thing on too, all possible values are valid
> dividers.
> Using the LTQ_WDT_SR prefix is also wrong these bits are used in the
> LTQ_WDT_CR registers, SR is the status register which is read only.
>
> This uses GENMASK where it is a mask and it uses shifts when a value is
> written to some bits.
>
> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
> Reviewed-by: Guenter Roeck <linux@roeck-us.net>
> Signed-off-by: Guenter Roeck <linux@roeck-us.net>
> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
> Signed-off-by: Sasha Levin <sashal@kernel.org>
> ---
> drivers/watchdog/lantiq_wdt.c | 36 ++++++++++++++++++-----------------
> 1 file changed, 19 insertions(+), 17 deletions(-)

This does not really fix a bug, I think it is not worth it to backport this.

Hauke

[unhandled content-type:application/pgp-signature]
\
 
 \ /
  Last update: 2018-11-05 23:27    [W:0.204 / U:3.636 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site