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SubjectRe: [PATCH] x86/entry/32: Fix setup of CS high bits
Hey Jan,

thanks for tracking this down and sending the fix! So your hardware
probably doesn't zero out the CS high bits, so that the code wrongly
detects that it came from the entry stack on return. Clearing the bits
earlier before the entry-stack check makes sense.

Acked-by: Joerg Roedel <jroedel@suse.de>
Reviewed-by: Joerg Roedel <jroedel@suse.de>

On Sat, Oct 13, 2018 at 11:54:54AM +0200, Jan Kiszka wrote:
> diff --git a/arch/x86/entry/entry_32.S b/arch/x86/entry/entry_32.S
> index 2767c625a52c..95c94d48ecd2 100644
> --- a/arch/x86/entry/entry_32.S
> +++ b/arch/x86/entry/entry_32.S
> @@ -389,6 +389,12 @@
> * that register for the time this macro runs
> */
>
> + /*
> + * Clear unused upper bits of the dword containing the word-sized CS
> + * slot in pt_regs in case hardware didn't clear it for us.
> + */
> + andl $(0x0000ffff), PT_CS(%esp)
> +
> /* Are we on the entry stack? Bail out if not! */
> movl PER_CPU_VAR(cpu_entry_area), %ecx
> addl $CPU_ENTRY_AREA_entry_stack + SIZEOF_entry_stack, %ecx
> @@ -407,12 +413,6 @@
> /* Load top of task-stack into %edi */
> movl TSS_entry2task_stack(%edi), %edi
>
> - /*
> - * Clear unused upper bits of the dword containing the word-sized CS
> - * slot in pt_regs in case hardware didn't clear it for us.
> - */
> - andl $(0x0000ffff), PT_CS(%esp)
> -
> /* Special case - entry from kernel mode via entry stack */
> #ifdef CONFIG_VM86
> movl PT_EFLAGS(%esp), %ecx # mix EFLAGS and CS
> --
> 2.16.4

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