Messages in this thread Patch in this message |  | | From | kan.liang@linux ... | Subject | [PATCH V3 4/5] perf/x86/intel: fix pmu read for large PEBS | Date | Mon, 29 Jan 2018 08:29:32 -0800 |
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From: Kan Liang <kan.liang@linux.intel.com>
Large PEBS needs to be specially handled in event count read.
It is only available for intel_pmu.
Only need to specially handle the large PEBS. For the threshold is one, even auto-reload is enabled, it doesn't need to be specially handled. Because, - auto-reload is only effect when event overflow. Once there is an overflow, the NMI handler will automatically drain_pebs(). - For other cases, x86_perf_event_update() is good enough.
Fixes: b8241d20699e ("perf/x86/intel: Implement batched PEBS interrupt handling (large PEBS interrupt threshold)") Signed-off-by: Kan Liang <kan.liang@linux.intel.com> --- arch/x86/events/intel/core.c | 9 +++++++++ 1 file changed, 9 insertions(+)
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c index 731153a..1610a9d 100644 --- a/arch/x86/events/intel/core.c +++ b/arch/x86/events/intel/core.c @@ -2060,6 +2060,14 @@ static void intel_pmu_del_event(struct perf_event *event) intel_pmu_pebs_del(event); } +static void intel_pmu_read_event(struct perf_event *event) +{ + if (intel_pmu_large_pebs_read(event)) + return; + + x86_perf_event_update(event); +} + static void intel_pmu_enable_fixed(struct hw_perf_event *hwc) { int idx = hwc->idx - INTEL_PMC_IDX_FIXED; @@ -3495,6 +3503,7 @@ static __initconst const struct x86_pmu intel_pmu = { .disable = intel_pmu_disable_event, .add = intel_pmu_add_event, .del = intel_pmu_del_event, + .read = intel_pmu_read_event, .hw_config = intel_pmu_hw_config, .schedule_events = x86_schedule_events, .eventsel = MSR_ARCH_PERFMON_EVENTSEL0, -- 2.7.4
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