Messages in this thread Patch in this message |  | | From | "Luck, Tony" <> | Subject | [PATCH 3/3] x86/intel_rdt: Turn off most RDT features on Skylake | Date | Thu, 24 Aug 2017 09:26:52 -0700 |
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From: Tony Luck <tony.luck@intel.com>
Errata list is included in this document: https://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/6th-gen-x-series-spec-update.pdf with more details in: https://www.intel.com/content/www/us/en/processors/xeon/scalable/xeon-scalable-spec-update.html
But the tl;dr summary (using tags from first of the documents) is: SKZ4 MBM does not accurately track write bandwidth SKZ17 CMT counters may not count accurately SKZ18 CAT may not restrict cacheline allocation under certain conditions SKZ19 MBM counters may undercount
Disable all these features on Skylake models. Users who understand the errata may re-enable using boot command line options.
Signed-off-by: Tony Luck <tony.luck@intel.com> --- arch/x86/kernel/cpu/intel_rdt.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/arch/x86/kernel/cpu/intel_rdt.c b/arch/x86/kernel/cpu/intel_rdt.c index 65222d8fd5ec..a55b74ca0973 100644 --- a/arch/x86/kernel/cpu/intel_rdt.c +++ b/arch/x86/kernel/cpu/intel_rdt.c @@ -767,6 +767,9 @@ static __init void rdt_quirks(void) if (!rdt_options[RDT_FLAG_L3_CAT].force_off) cache_alloc_hsw_probe(); break; + case INTEL_FAM6_SKYLAKE_X: + if (boot_cpu_data.x86_mask <= 4) + set_rdt_options("!cmt,!mbmtotal,!mbmlocal,!l3cat"); } } -- 2.11.0
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