Messages in this thread |  | | Subject | [Regression Linux 4.11] TPM module not loaded anymore (was: Regression between Linux 3.16 and 4.8/4.9 on Lenovo X60 with coreboot) | From | Paul Menzel <> | Date | Sun, 09 Apr 2017 19:34:43 +0200 |
| |
Dear Linux folks,
It turns out that stricter checks in the ACPI subsystem, introduced in commit 57707a9a77 (ACPICA: Resources: Not a valid resource if buffer length too long) [1], cause the TPM module not to be loaded anymore on the Lenovo X60 with coreboot [2].
Am Freitag, den 07.04.2017, 22:58 +0200 schrieb Paul Menzel: > On 2017-04-07 22:13, Jarkko Sakkinen wrote: > > On Thu, Apr 06, 2017 at 01:10:13PM -0600, Jason Gunthorpe wrote: > >> On Thu, Apr 06, 2017 at 08:26:22PM +0200, Paul Menzel wrote: > >> > >We added direct ACPI binding to the driver in addition to PNP, so if > >> > >you have an ACPI table it goes down that path and does some additional > >> > >validation of what is in the TPM. The BIOS must provide a > >> > >acpi_dev_resource_memory and a ACPI_SIG_TPM2 for the ACPI entry at a > >> > >minimum. > >> > > >> > Is it correct, that this is added in/for 4.11, so just recently? Testing > >> > with Linux 4.10.8, everything is detected just fine. > >> > >> No, it is quite a bit older.. And it should only go for TPM2, which I > >> don't think you have?? > >> > >> Maybe Jarkko has a guess, but sure sounds like something is recently > >> broken in 4.11 > > > > I'll come back to this. I have to re-read the whole mail thread to > > get back into the context. Lots of multitasking because of release > > and so forth. Sorry for the latency! > > I started bisecting this issue. This is the current state.
[…]
Here are the results.
``` git bisect log # bad: [7a771ceac771d009f7203c40b256b0608d7ea2f8] Merge tag 'dm-4.11-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/device-mapper/linux-dm # good: [c470abd4fde40ea6a0846a2beab642a578c0b8cd] Linux 4.10 git bisect start 'HEAD' 'v4.10' # good: [b3de5ad688f0f52457e73767f95a640ab4158d0d] Merge tag 'regmap-v4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regmap git bisect good b3de5ad688f0f52457e73767f95a640ab4158d0d # bad: [fd4a61e08aa79f2b7835b25c6f94f27bd2d65990] sched/core: Fix build paravirt build on arm and arm64 git bisect bad fd4a61e08aa79f2b7835b25c6f94f27bd2d65990 # good: [7aa7d608112baf63a0b1278955f9619427373807] Merge tag 'leds_for_4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/j.anaszewski/linux-leds git bisect good 7aa7d608112baf63a0b1278955f9619427373807 # good: [02c3de1105228e367320e7fdeffbf511904f398c] Merge tag 'pm-4.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm git bisect good 02c3de1105228e367320e7fdeffbf511904f398c # bad: [6c24337f22115d669e24ce990842dab667371b4d] Merge tag 'fscrypt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tytso/fscrypt git bisect bad 6c24337f22115d669e24ce990842dab667371b4d # bad: [a74d1cafc22e100a9b59c50943ca09c37e03dce8] Merge branches 'acpi-bus', 'acpi-sleep' and 'acpi-processor' git bisect bad a74d1cafc22e100a9b59c50943ca09c37e03dce8 # bad: [ce87e09dd88c61f9088768a7708828423549725c] ACPICA: Parser: Allow method invocations as target operands git bisect bad ce87e09dd88c61f9088768a7708828423549725c # good: [0fc5e8f4e4b33ddfa1d1d673fcd420d6e13eb076] ACPICA: Hardware: Add sleep register hooks git bisect good 0fc5e8f4e4b33ddfa1d1d673fcd420d6e13eb076 # good: [a654b8ca6d28736995de767ba62e801fd806a3b2] ACPICA: Disassembler: Add Switch/Case disassembly support git bisect good a654b8ca6d28736995de767ba62e801fd806a3b2 # bad: [57707a9a7780fab426b8ae9b4c7b65b912a748b3] ACPICA: Resources: Not a valid resource if buffer length too long git bisect bad 57707a9a7780fab426b8ae9b4c7b65b912a748b3 # good: [7225d0467c59e55566df396d6ecd5baf26ef3d9b] ACPICA: Utilities: Update debug output git bisect good 7225d0467c59e55566df396d6ecd5baf26ef3d9b # first bad commit: [57707a9a7780fab426b8ae9b4c7b65b912a748b3] ACPICA: Resources: Not a valid resource if buffer length too long ```
I suggest, that just a warning is printed in this case, or that an option is added to enable some kind of “strict mode” or a quirk table.
Please find the decompiled DSDT attached. The code to generate the ASL coreboot code is available [3].
Please tell me, what information you need.
Kind regards,
Paul
[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=57707a9a778 [2] https://review.coreboot.org/13410/ [3] https://review.coreboot.org/cgit/coreboot.git/tree/src/drivers/pc80/tpm/tpm.c /* * Intel ACPI Component Architecture * AML Disassembler version 20140926-32 [Oct 1 2014] * Copyright (c) 2000 - 2014 Intel Corporation * * Disassembly of DSDT, Sun Apr 9 19:30:34 2017 * * Original Table Header: * Signature "DSDT" * Length 0x00002E58 (11864) * Revision 0x03 * Checksum 0x18 * OEM ID "COREv4" * OEM Table ID "COREBOOT" * OEM Revision 0x20090419 (537461785) * Compiler ID "INTL" * Compiler Version 0x20140926 (538183974) */ DefinitionBlock ("DSDT.aml", "DSDT", 3, "COREv4", "COREBOOT", 0x20090419) {
External (_PR_.CP00, UnknownObj) External (_PR_.CP01, UnknownObj) External (LCD0, UnknownObj) External (PDC0, UnknownObj) External (PDC1, UnknownObj)
Scope (\) { Name (NVSA, 0x7F7FE980) }
Method (_PTS, 1, NotSerialized) // _PTS: Prepare To Sleep { \_SB.PCI0.LPCB.EC.MUTE (One) \_SB.PCI0.LPCB.EC.USBP (Zero) \_SB.PCI0.LPCB.EC.RADI (Zero) }
Method (_WAK, 1, NotSerialized) // _WAK: Wake { If (LEqual (Arg0, 0x03)) {} If (LEqual (Arg0, 0x04)) {} Return (Package (0x02) { Zero, Zero }) }
Scope (_SB) { Method (_INI, 0, NotSerialized) // _INI: Initialize { GOS () If (LAnd (LEqual (OSYS, 0x07D1), MPEN)) {} } }
Name (PICM, Zero) Name (DSEN, One) OperationRegion (GNVS, SystemMemory, NVSA, 0x0100) Field (GNVS, ByteAcc, NoLock, Preserve) { OSYS, 16, SMIF, 8, PRM0, 8, PRM1, 8, SCIF, 8, PRM2, 8, PRM3, 8, LCKF, 8, PRM4, 8, PRM5, 8, P80D, 32, LIDS, 8, PWRS, 8, DBGS, 8, LINX, 8, DCKN, 8, ACTT, 8, PSVT, 8, TC1V, 8, TC2V, 8, TSPV, 8, CRTT, 8, DTSE, 8, DTS1, 8, DTS2, 8, Offset (0x1E), BNUM, 8, B0SC, 8, B1SC, 8, B2SC, 8, B0SS, 8, B1SS, 8, B2SS, 8, Offset (0x28), APIC, 8, MPEN, 8, PCP0, 8, PCP1, 8, PPCM, 8, Offset (0x32), NATP, 8, CMAP, 8, CMBP, 8, LPTP, 8, FDCP, 8, RFDV, 8, HOTK, 8, RTCF, 8, UTIL, 8, ACIN, 8, IGDS, 8, TLST, 8, CADL, 8, PADL, 8, CSTE, 16, NSTE, 16, SSTE, 16, NDID, 8, DID1, 32, DID2, 32, DID3, 32, DID4, 32, DID5, 32, Offset (0x64), BLCS, 8, BRTL, 8, ODDS, 8, Offset (0x6E), ALSE, 8, ALAF, 8, LLOW, 8, LHIH, 8, Offset (0x78), EMAE, 8, EMAP, 16, EMAL, 16, Offset (0x82), MEFE, 8, Offset (0x8C), TPMP, 8, TPME, 8, Offset (0x96), GTF0, 56, GTF1, 56, GTF2, 56, IDEM, 8, IDET, 8, Offset (0xB4), ASLB, 32, IBTT, 8, IPAT, 8, ITVF, 8, ITVM, 8, IPSC, 8, IBLC, 8, IBIA, 8, ISSC, 8, I409, 8, I509, 8, I609, 8, I709, 8, IDMM, 8, IDMS, 8, IF1E, 8, HVCO, 8, NXD1, 32, NXD2, 32, NXD3, 32, NXD4, 32, NXD5, 32, NXD6, 32, NXD7, 32, NXD8, 32, Offset (0xF0), DOCK, 8, BTEN, 8 }
OperationRegion (APMP, SystemIO, 0xB2, 0x02) Field (APMP, ByteAcc, NoLock, Preserve) { APMC, 8, APMS, 8 }
OperationRegion (POST, SystemIO, 0x80, One) Field (POST, ByteAcc, Lock, Preserve) { DBG0, 8 }
Method (TRAP, 1, Serialized) { Store (Arg0, SMIF) /* \SMIF */ Store (Zero, TRP0) /* \TRP0 */ Return (SMIF) /* \SMIF */ }
Method (_PIC, 1, NotSerialized) // _PIC: Interrupt Model { Store (Arg0, PICM) /* \PICM */ }
Method (GOS, 0, NotSerialized) { Store (0x07D0, OSYS) /* \OSYS */ If (CondRefOf (_OSI)) { If (_OSI ("Linux")) { Store (One, LINX) /* \LINX */ }
If (_OSI ("Windows 2001")) { Store (0x07D1, OSYS) /* \OSYS */ }
If (_OSI ("Windows 2001 SP1")) { Store (0x07D1, OSYS) /* \OSYS */ }
If (_OSI ("Windows 2001 SP2")) { Store (0x07D2, OSYS) /* \OSYS */ }
If (_OSI ("Windows 2006")) { Store (0x07D6, OSYS) /* \OSYS */ } } }
Scope (_GPE) { Method (_L18, 0, NotSerialized) // _Lxx: Level-Triggered GPE { Store (\_SB.PCI0.LPCB.EC.WAKE, Local0) Increment (Local0) } }
Method (PNOT, 0, NotSerialized) { If (MPEN) { If (And (PDC0, 0x08)) { Notify (\_PR.CP00, 0x80) // Status Change If (And (PDC0, 0x10)) { Sleep (0x64) Notify (\_PR.CP00, 0x81) // Information Change } }
If (And (PDC1, 0x08)) { Notify (\_PR.CP01, 0x80) // Status Change If (And (PDC1, 0x10)) { Sleep (0x64) Notify (\_PR.CP01, 0x81) // Information Change } } } Else { Notify (\_PR.CP00, 0x80) // Status Change Sleep (0x64) Notify (\_PR.CP00, 0x81) // Information Change } }
Scope (_SB) { Device (PCI0) { Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID Name (_ADR, Zero) // _ADR: Address Name (_BBN, Zero) // _BBN: BIOS Bus Number Device (MCHC) { Name (_ADR, Zero) // _ADR: Address OperationRegion (MCHP, PCI_Config, Zero, 0x0100) Field (MCHP, DWordAcc, NoLock, Preserve) { Offset (0x40), EPEN, 1, , 11, EPBR, 20, MHEN, 1, , 13, MHBR, 18, PXEN, 1, PXSZ, 2, , 23, PXBR, 6, DMEN, 1, , 11, DMBR, 20, Offset (0x90), , 4, PM0H, 2, Offset (0x91), PM1L, 2, , 2, PM1H, 2, Offset (0x92), PM2L, 2, , 2, PM2H, 2, Offset (0x93), PM3L, 2, , 2, PM3H, 2, Offset (0x94), PM4L, 2, , 2, PM4H, 2, Offset (0x95), PM5L, 2, , 2, PM5H, 2, Offset (0x96), PM6L, 2, , 2, PM6H, 2, Offset (0x97), Offset (0x9C), , 3, TLUD, 5, Offset (0xA0), TOM, 16 } }
Name (MCRS, ResourceTemplate () { WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x0000, // Range Minimum 0x00FF, // Range Maximum 0x0000, // Translation Offset 0x0100, // Length ,, ) DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x00000000, // Granularity 0x00000000, // Range Minimum 0x00000CF7, // Range Maximum 0x00000000, // Translation Offset 0x00000CF8, // Length ,, , TypeStatic) IO (Decode16, 0x0CF8, // Range Minimum 0x0CF8, // Range Maximum 0x01, // Alignment 0x08, // Length ) DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, 0x00000000, // Granularity 0x00000D00, // Range Minimum 0x0000FFFF, // Range Maximum 0x00000000, // Translation Offset 0x0000F300, // Length ,, , TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000A0000, // Range Minimum 0x000BFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00020000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000C0000, // Range Minimum 0x000C3FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000C4000, // Range Minimum 0x000C7FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000C8000, // Range Minimum 0x000CBFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000CC000, // Range Minimum 0x000CFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000D0000, // Range Minimum 0x000D3FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000D4000, // Range Minimum 0x000D7FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000D8000, // Range Minimum 0x000DBFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000DC000, // Range Minimum 0x000DFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000E0000, // Range Minimum 0x000E3FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000E4000, // Range Minimum 0x000E7FFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000E8000, // Range Minimum 0x000EBFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000EC000, // Range Minimum 0x000EFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00004000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x000F0000, // Range Minimum 0x000FFFFF, // Range Maximum 0x00000000, // Translation Offset 0x00010000, // Length ,, , AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0x00000000, // Range Minimum 0xFEBFFFFF, // Range Maximum 0x00000000, // Translation Offset 0xFEC00000, // Length ,, _Y00, AddressRangeMemory, TypeStatic) DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity 0xFED40000, // Range Minimum 0xFED44FFF, // Range Maximum 0x00000000, // Translation Offset 0x00005000, // Length ,, , AddressRangeMemory, TypeStatic) }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { CreateDWordField (MCRS, \_SB.PCI0._Y00._MIN, PMIN) // _MIN: Minimum Base Address CreateDWordField (MCRS, \_SB.PCI0._Y00._MAX, PMAX) // _MAX: Maximum Base Address CreateDWordField (MCRS, \_SB.PCI0._Y00._LEN, PLEN) // _LEN: Length ShiftLeft (^MCHC.TLUD, 0x1B, PMIN) /* \_SB_.PCI0._CRS.PMIN */ Add (Subtract (PMAX, PMIN), One, PLEN) /* \_SB_.PCI0._CRS.PLEN */ Return (MCRS) /* \_SB_.PCI0.MCRS */ }
Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (Package (0x0D) { Package (0x04) { 0x0002FFFF, Zero, Zero, 0x10 },
Package (0x04) { 0x001BFFFF, One, Zero, 0x11 },
Package (0x04) { 0x001CFFFF, Zero, Zero, 0x14 },
Package (0x04) { 0x001CFFFF, One, Zero, 0x15 },
Package (0x04) { 0x001CFFFF, 0x02, Zero, 0x16 },
Package (0x04) { 0x001CFFFF, 0x03, Zero, 0x17 },
Package (0x04) { 0x001DFFFF, Zero, Zero, 0x10 },
Package (0x04) { 0x001DFFFF, One, Zero, 0x11 },
Package (0x04) { 0x001DFFFF, 0x02, Zero, 0x12 },
Package (0x04) { 0x001DFFFF, 0x03, Zero, 0x13 },
Package (0x04) { 0x001FFFFF, Zero, Zero, 0x17 },
Package (0x04) { 0x001FFFFF, One, Zero, 0x10 },
Package (0x04) { 0x001FFFFF, 0x02, Zero, 0x10 } }) } Else { Return (Package (0x0D) { Package (0x04) { 0x0002FFFF, Zero, ^LPCB.LNKA, Zero },
Package (0x04) { 0x001BFFFF, One, ^LPCB.LNKB, Zero },
Package (0x04) { 0x001CFFFF, Zero, ^LPCB.LNKE, Zero },
Package (0x04) { 0x001CFFFF, One, ^LPCB.LNKF, Zero },
Package (0x04) { 0x001CFFFF, 0x02, ^LPCB.LNKG, Zero },
Package (0x04) { 0x001CFFFF, 0x03, ^LPCB.LNKH, Zero },
Package (0x04) { 0x001DFFFF, Zero, ^LPCB.LNKA, Zero },
Package (0x04) { 0x001DFFFF, One, ^LPCB.LNKB, Zero },
Package (0x04) { 0x001DFFFF, 0x02, ^LPCB.LNKC, Zero },
Package (0x04) { 0x001DFFFF, 0x03, ^LPCB.LNKD, Zero },
Package (0x04) { 0x001FFFFF, Zero, ^LPCB.LNKH, Zero },
Package (0x04) { 0x001FFFFF, One, ^LPCB.LNKA, Zero },
Package (0x04) { 0x001FFFFF, 0x02, ^LPCB.LNKA, Zero } }) } }
Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities { CreateDWordField (Arg3, Zero, CDW1) CreateDWordField (Arg3, 0x04, CDW2) CreateDWordField (Arg3, 0x08, CDW3) If (LEqual (Arg0, ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)) { Return (Arg3) } Else { Or (CDW1, 0x04, CDW1) /* \_SB_.PCI0._OSC.CDW1 */ Return (Arg3) } }
Device (PDRC) { Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID Name (_UID, One) // _UID: Unique ID Name (PDRS, ResourceTemplate () { Memory32Fixed (ReadWrite, 0xFED1C000, // Address Base 0x00004000, // Address Length ) Memory32Fixed (ReadWrite, 0xFED14000, // Address Base 0x00004000, // Address Length ) Memory32Fixed (ReadWrite, 0xFED18000, // Address Base 0x00001000, // Address Length ) Memory32Fixed (ReadWrite, 0xFED19000, // Address Base 0x00001000, // Address Length ) Memory32Fixed (ReadWrite, 0xF0000000, // Address Base 0x04000000, // Address Length ) Memory32Fixed (ReadWrite, 0xFED20000, // Address Base 0x00020000, // Address Length ) Memory32Fixed (ReadWrite, 0xFED40000, // Address Base 0x00005000, // Address Length ) Memory32Fixed (ReadWrite, 0xFED45000, // Address Base 0x0004B000, // Address Length ) }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Return (PDRS) /* \_SB_.PCI0.PDRC.PDRS */ } }
Device (PEGP) { Name (_ADR, 0x00010000) // _ADR: Address Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (Package (0x04) { Package (0x04) { 0xFFFF, Zero, Zero, 0x10 },
Package (0x04) { 0xFFFF, One, Zero, 0x11 },
Package (0x04) { 0xFFFF, 0x02, Zero, 0x12 },
Package (0x04) { 0xFFFF, 0x03, Zero, 0x13 } }) } Else { Return (Package (0x04) { Package (0x04) { 0xFFFF, Zero, ^^LPCB.LNKA, Zero },
Package (0x04) { 0xFFFF, One, ^^LPCB.LNKB, Zero },
Package (0x04) { 0xFFFF, 0x02, ^^LPCB.LNKC, Zero },
Package (0x04) { 0xFFFF, 0x03, ^^LPCB.LNKD, Zero } }) } } }
Device (GFX0) { Name (_ADR, 0x00020000) // _ADR: Address Name (BRIG, Package (0x12) { 0x0F, 0x0F, Zero, One, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F }) Method (XBCM, 1, NotSerialized) { Store (Or (ShiftLeft (Arg0, 0x04), 0x0F), ^^DSPC.BRTC) /* \_SB_.PCI0.DSPC.BRTC */ TRAP (0x03) }
Method (XBQC, 0, NotSerialized) { Store (^^DSPC.BRTC, Local0) ShiftRight (Local0, 0x04, Local0) Return (Local0) }
Name (BRCT, Zero) Method (BRID, 1, NotSerialized) { Store (Match (BRIG, MEQ, Arg0, MTR, Zero, 0x02), Local0) If (LEqual (Local0, Ones)) { Return (Subtract (SizeOf (BRIG), One)) }
Return (Local0) }
Method (XBCL, 0, NotSerialized) { Store (One, BRCT) /* \_SB_.PCI0.GFX0.BRCT */ Return (BRIG) /* \_SB_.PCI0.GFX0.BRIG */ }
Method (_DOS, 1, NotSerialized) // _DOS: Disable Output Switching { Store (And (Arg0, 0x07), DSEN) /* \DSEN */ }
Method (DECB, 0, NotSerialized) { If (BRCT) { Notify (LCD0, 0x87) // Device-Specific } Else { Store (BRID (XBQC ()), Local0) If (LNotEqual (Local0, 0x02)) { Decrement (Local0) }
XBCM (DerefOf (Index (BRIG, Local0))) } }
Method (INCB, 0, NotSerialized) { If (BRCT) { Notify (LCD0, 0x86) // Device-Specific } Else { Store (BRID (XBQC ()), Local0) If (LNotEqual (Local0, Subtract (SizeOf (BRIG), One))) { Increment (Local0) }
XBCM (DerefOf (Index (BRIG, Local0))) } }
Method (XDCS, 1, NotSerialized) { TRAP (One) If (And (CSTE, ShiftLeft (One, Arg0))) { Return (0x1F) }
Return (0x1D) }
Method (XDGS, 1, NotSerialized) { If (And (NSTE, ShiftLeft (One, Arg0))) { Return (One) }
Return (Zero) }
Method (XDSS, 2, NotSerialized) { If (LEqual (And (Arg0, 0xC0000000), 0xC0000000)) { Store (NSTE, CSTE) /* \CSTE */ } } }
Device (DSPC) { Name (_ADR, 0x00020001) // _ADR: Address OperationRegion (DSPC, PCI_Config, Zero, 0x0100) Field (DSPC, ByteAcc, NoLock, Preserve) { Offset (0xF4), BRTC, 8 } }
Scope (\) { OperationRegion (IO_T, SystemIO, 0x0800, 0x10) Field (IO_T, ByteAcc, NoLock, Preserve) { Offset (0x08), TRP0, 8 }
OperationRegion (PMIO, SystemIO, 0x0500, 0x80) Field (PMIO, ByteAcc, NoLock, Preserve) { Offset (0x42), , 1, GPEC, 1, , 9, SCIS, 1, , 6 }
OperationRegion (GPIO, SystemIO, 0x0480, 0x3C) Field (GPIO, ByteAcc, NoLock, Preserve) { GU00, 8, GU01, 8, GU02, 8, GU03, 8, GIO0, 8, GIO1, 8, GIO2, 8, GIO3, 8, Offset (0x0C), GP00, 1, GP01, 1, GP02, 1, GP03, 1, GP04, 1, GP05, 1, GP06, 1, GP07, 1, GP08, 1, GP09, 1, GP10, 1, GP11, 1, GP12, 1, GP13, 1, GP14, 1, GP15, 1, GP16, 1, GP17, 1, GP18, 1, GP19, 1, GP20, 1, GP21, 1, GP22, 1, GP23, 1, GP24, 1, GP25, 1, GP26, 1, GP27, 1, GP28, 1, GP29, 1, GP30, 1, GP31, 1, Offset (0x18), GB00, 8, GB01, 8, GB02, 8, GB03, 8, Offset (0x2C), GIV0, 8, GIV1, 8, GIV2, 8, GIV3, 8, GU04, 8, GU05, 8, GU06, 8, GU07, 8, GIO4, 8, GIO5, 8, GIO6, 8, GIO7, 8, GP32, 1, GP33, 1, GP34, 1, GP35, 1, GP36, 1, GP37, 1, GP38, 1, GP39, 1, GL05, 8, GL06, 8, GL07, 8 }
OperationRegion (RCRB, SystemMemory, 0xFED1C000, 0x4000) Field (RCRB, DWordAcc, Lock, Preserve) { Offset (0x1000), Offset (0x3000), Offset (0x3404), HPAS, 2, , 5, HPTE, 1, Offset (0x3418), , 1, PATD, 1, SATD, 1, SMBD, 1, HDAD, 1, A97D, 1, M97D, 1, ILND, 1, US1D, 1, US2D, 1, US3D, 1, US4D, 1, , 2, LPBD, 1, EHCD, 1, RP1D, 1, RP2D, 1, RP3D, 1, RP4D, 1, RP5D, 1, RP6D, 1 } }
Device (HDEF) { Name (_ADR, 0x001B0000) // _ADR: Address Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x05, 0x04 }) }
Device (RP01) { Name (_ADR, 0x001C0000) // _ADR: Address Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (Package (0x04) { Package (0x04) { 0xFFFF, Zero, Zero, 0x10 },
Package (0x04) { 0xFFFF, One, Zero, 0x11 },
Package (0x04) { 0xFFFF, 0x02, Zero, 0x12 },
Package (0x04) { 0xFFFF, 0x03, Zero, 0x13 } }) } Else { Return (Package (0x04) { Package (0x04) { 0xFFFF, Zero, ^^LPCB.LNKA, Zero },
Package (0x04) { 0xFFFF, One, ^^LPCB.LNKB, Zero },
Package (0x04) { 0xFFFF, 0x02, ^^LPCB.LNKC, Zero },
Package (0x04) { 0xFFFF, 0x03, ^^LPCB.LNKD, Zero } }) } } }
Device (RP02) { Name (_ADR, 0x001C0001) // _ADR: Address Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (Package (0x04) { Package (0x04) { 0xFFFF, Zero, Zero, 0x11 },
Package (0x04) { 0xFFFF, One, Zero, 0x12 },
Package (0x04) { 0xFFFF, 0x02, Zero, 0x13 },
Package (0x04) { 0xFFFF, 0x03, Zero, 0x10 } }) } Else { Return (Package (0x04) { Package (0x04) { 0xFFFF, Zero, ^^LPCB.LNKB, Zero },
Package (0x04) { 0xFFFF, One, ^^LPCB.LNKC, Zero },
Package (0x04) { 0xFFFF, 0x02, ^^LPCB.LNKD, Zero },
Package (0x04) { 0xFFFF, 0x03, ^^LPCB.LNKA, Zero } }) } } }
Device (RP03) { Name (_ADR, 0x001C0002) // _ADR: Address Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (Package (0x04) { Package (0x04) { 0xFFFF, Zero, Zero, 0x12 },
Package (0x04) { 0xFFFF, One, Zero, 0x13 },
Package (0x04) { 0xFFFF, 0x02, Zero, 0x10 },
Package (0x04) { 0xFFFF, 0x03, Zero, 0x11 } }) } Else { Return (Package (0x04) { Package (0x04) { 0xFFFF, Zero, ^^LPCB.LNKC, Zero },
Package (0x04) { 0xFFFF, One, ^^LPCB.LNKD, Zero },
Package (0x04) { 0xFFFF, 0x02, ^^LPCB.LNKA, Zero },
Package (0x04) { 0xFFFF, 0x03, ^^LPCB.LNKB, Zero } }) } } }
Device (RP04) { Name (_ADR, 0x001C0003) // _ADR: Address Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (Package (0x04) { Package (0x04) { 0xFFFF, Zero, Zero, 0x13 },
Package (0x04) { 0xFFFF, One, Zero, 0x10 },
Package (0x04) { 0xFFFF, 0x02, Zero, 0x11 },
Package (0x04) { 0xFFFF, 0x03, Zero, 0x12 } }) } Else { Return (Package (0x04) { Package (0x04) { 0xFFFF, Zero, ^^LPCB.LNKD, Zero },
Package (0x04) { 0xFFFF, One, ^^LPCB.LNKA, Zero },
Package (0x04) { 0xFFFF, 0x02, ^^LPCB.LNKB, Zero },
Package (0x04) { 0xFFFF, 0x03, ^^LPCB.LNKC, Zero } }) } } }
Device (RP05) { Name (_ADR, 0x001C0004) // _ADR: Address Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (Package (0x04) { Package (0x04) { 0xFFFF, Zero, Zero, 0x10 },
Package (0x04) { 0xFFFF, One, Zero, 0x11 },
Package (0x04) { 0xFFFF, 0x02, Zero, 0x12 },
Package (0x04) { 0xFFFF, 0x03, Zero, 0x13 } }) } Else { Return (Package (0x04) { Package (0x04) { 0xFFFF, Zero, ^^LPCB.LNKA, Zero },
Package (0x04) { 0xFFFF, One, ^^LPCB.LNKB, Zero },
Package (0x04) { 0xFFFF, 0x02, ^^LPCB.LNKC, Zero },
Package (0x04) { 0xFFFF, 0x03, ^^LPCB.LNKD, Zero } }) } } }
Device (RP06) { Name (_ADR, 0x001C0005) // _ADR: Address Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (Package (0x04) { Package (0x04) { 0xFFFF, Zero, Zero, 0x11 },
Package (0x04) { 0xFFFF, One, Zero, 0x12 },
Package (0x04) { 0xFFFF, 0x02, Zero, 0x13 },
Package (0x04) { 0xFFFF, 0x03, Zero, 0x10 } }) } Else { Return (Package (0x04) { Package (0x04) { 0xFFFF, Zero, ^^LPCB.LNKB, Zero },
Package (0x04) { 0xFFFF, One, ^^LPCB.LNKC, Zero },
Package (0x04) { 0xFFFF, 0x02, ^^LPCB.LNKD, Zero },
Package (0x04) { 0xFFFF, 0x03, ^^LPCB.LNKA, Zero } }) } } }
Device (USB1) { Name (_ADR, 0x001D0000) // _ADR: Address OperationRegion (U01P, PCI_Config, Zero, 0x0100) Field (U01P, DWordAcc, NoLock, Preserve) { Offset (0xC4), U1WE, 2 }
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x03, 0x04 }) Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake { If (Arg0) { Store (0x03, U1WE) /* \_SB_.PCI0.USB1.U1WE */ } Else { Store (Zero, U1WE) /* \_SB_.PCI0.USB1.U1WE */ } }
Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State { Return (0x02) }
Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State { Return (0x02) } }
Device (USB2) { Name (_ADR, 0x001D0001) // _ADR: Address OperationRegion (U02P, PCI_Config, Zero, 0x0100) Field (U02P, DWordAcc, NoLock, Preserve) { Offset (0xC4), U2WE, 2 }
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x03, 0x04 }) Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake { If (Arg0) { Store (0x03, U2WE) /* \_SB_.PCI0.USB2.U2WE */ } Else { Store (Zero, U2WE) /* \_SB_.PCI0.USB2.U2WE */ } }
Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State { Return (0x02) }
Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State { Return (0x02) } }
Device (USB3) { Name (_ADR, 0x001D0002) // _ADR: Address OperationRegion (U03P, PCI_Config, Zero, 0x0100) Field (U03P, DWordAcc, NoLock, Preserve) { Offset (0xC4), U3WE, 2 }
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x03, 0x04 }) Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake { If (Arg0) { Store (0x03, U3WE) /* \_SB_.PCI0.USB3.U3WE */ } Else { Store (Zero, U3WE) /* \_SB_.PCI0.USB3.U3WE */ } }
Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State { Return (0x02) }
Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State { Return (0x02) } }
Device (USB4) { Name (_ADR, 0x001D0003) // _ADR: Address OperationRegion (U04P, PCI_Config, Zero, 0x0100) Field (U04P, DWordAcc, NoLock, Preserve) { Offset (0xC4), U4WE, 2 }
Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x03, 0x04 }) Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake { If (Arg0) { Store (0x03, U4WE) /* \_SB_.PCI0.USB4.U4WE */ } Else { Store (Zero, U4WE) /* \_SB_.PCI0.USB4.U4WE */ } }
Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State { Return (0x02) }
Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State { Return (0x02) } }
Device (EHC1) { Name (_ADR, 0x001D0007) // _ADR: Address Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x0D, 0x04 }) Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State { Return (0x02) }
Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State { Return (0x02) }
Device (HUB7) { Name (_ADR, Zero) // _ADR: Address Device (PRT1) { Name (_ADR, One) // _ADR: Address }
Device (PRT2) { Name (_ADR, 0x02) // _ADR: Address }
Device (PRT3) { Name (_ADR, 0x03) // _ADR: Address }
Device (PRT4) { Name (_ADR, 0x04) // _ADR: Address }
Device (PRT5) { Name (_ADR, 0x05) // _ADR: Address }
Device (PRT6) { Name (_ADR, 0x06) // _ADR: Address } } }
Device (PCIB) { Name (_ADR, 0x001E0000) // _ADR: Address Device (SLT1) { Name (_ADR, Zero) // _ADR: Address Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x0B, 0x04 }) }
Device (SLT2) { Name (_ADR, 0x00010000) // _ADR: Address Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x0B, 0x04 }) }
Device (SLT3) { Name (_ADR, 0x00020000) // _ADR: Address Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x0B, 0x04 }) }
Device (SLT6) { Name (_ADR, 0x00050000) // _ADR: Address Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x0B, 0x04 }) }
Device (LANC) { Name (_ADR, 0x00080000) // _ADR: Address Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x0B, 0x03 }) }
Device (LANR) { Name (_ADR, Zero) // _ADR: Address Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x0B, 0x03 }) }
Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table { If (PICM) { Return (Package (0x07) { Package (0x04) { 0xFFFF, Zero, Zero, 0x10 },
Package (0x04) { 0xFFFF, One, Zero, 0x11 },
Package (0x04) { 0xFFFF, 0x02, Zero, 0x12 },
Package (0x04) { 0x0001FFFF, Zero, Zero, 0x10 },
Package (0x04) { 0x0002FFFF, Zero, Zero, 0x15 },
Package (0x04) { 0x0002FFFF, One, Zero, 0x16 },
Package (0x04) { 0x0008FFFF, Zero, Zero, 0x14 } }) } Else { Return (Package (0x07) { Package (0x04) { 0xFFFF, Zero, ^^LPCB.LNKA, Zero },
Package (0x04) { 0xFFFF, One, ^^LPCB.LNKB, Zero },
Package (0x04) { 0xFFFF, 0x02, ^^LPCB.LNKC, Zero },
Package (0x04) { 0x0001FFFF, Zero, ^^LPCB.LNKA, Zero },
Package (0x04) { 0x0002FFFF, Zero, ^^LPCB.LNKF, Zero },
Package (0x04) { 0x0002FFFF, One, ^^LPCB.LNKG, Zero },
Package (0x04) { 0x0008FFFF, Zero, ^^LPCB.LNKE, Zero } }) } } }
Device (AUD0) { Name (_ADR, 0x001E0002) // _ADR: Address }
Device (MODM) { Name (_ADR, 0x001E0003) // _ADR: Address Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake { 0x05, 0x04 }) }
Device (LPCB) { Name (_ADR, 0x001F0000) // _ADR: Address OperationRegion (LPC0, PCI_Config, Zero, 0x0100) Field (LPC0, AnyAcc, NoLock, Preserve) { Offset (0x40), PMBS, 16, Offset (0x60), PRTA, 8, PRTB, 8, PRTC, 8, PRTD, 8, Offset (0x68), PRTE, 8, PRTF, 8, PRTG, 8, PRTH, 8, Offset (0x80), IOD0, 8, IOD1, 8, Offset (0xF0), RCEN, 1, , 13, RCBA, 18 }
Device (LNKA) { Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID Name (_UID, One) // _UID: Unique ID Method (_DIS, 0, Serialized) // _DIS: Disable Device { Store (0x80, PRTA) /* \_SB_.PCI0.LPCB.PRTA */ }
Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings { IRQ (Level, ActiveLow, Shared, ) {3,4,5,6,7,10,12,14,15} }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RTLA, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {} }) CreateWordField (RTLA, One, IRQ0) Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKA._CRS.IRQ0 */ ShiftLeft (One, And (PRTA, 0x0F), IRQ0) /* \_SB_.PCI0.LPCB.LNKA._CRS.IRQ0 */ Return (RTLA) /* \_SB_.PCI0.LPCB.LNKA._CRS.RTLA */ }
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, One, IRQ0) FindSetRightBit (IRQ0, Local0) Decrement (Local0) Store (Local0, PRTA) /* \_SB_.PCI0.LPCB.PRTA */ }
Method (_STA, 0, Serialized) // _STA: Status { If (And (PRTA, 0x80)) { Return (0x09) } Else { Return (0x0B) } } }
Device (LNKB) { Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID Name (_UID, 0x02) // _UID: Unique ID Method (_DIS, 0, Serialized) // _DIS: Disable Device { Store (0x80, PRTB) /* \_SB_.PCI0.LPCB.PRTB */ }
Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings { IRQ (Level, ActiveLow, Shared, ) {3,4,5,6,7,11,12,14,15} }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RTLB, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {} }) CreateWordField (RTLB, One, IRQ0) Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKB._CRS.IRQ0 */ ShiftLeft (One, And (PRTB, 0x0F), IRQ0) /* \_SB_.PCI0.LPCB.LNKB._CRS.IRQ0 */ Return (RTLB) /* \_SB_.PCI0.LPCB.LNKB._CRS.RTLB */ }
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, One, IRQ0) FindSetRightBit (IRQ0, Local0) Decrement (Local0) Store (Local0, PRTB) /* \_SB_.PCI0.LPCB.PRTB */ }
Method (_STA, 0, Serialized) // _STA: Status { If (And (PRTB, 0x80)) { Return (0x09) } Else { Return (0x0B) } } }
Device (LNKC) { Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID Name (_UID, 0x03) // _UID: Unique ID Method (_DIS, 0, Serialized) // _DIS: Disable Device { Store (0x80, PRTC) /* \_SB_.PCI0.LPCB.PRTC */ }
Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings { IRQ (Level, ActiveLow, Shared, ) {3,4,5,6,7,10,12,14,15} }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RTLC, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {} }) CreateWordField (RTLC, One, IRQ0) Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKC._CRS.IRQ0 */ ShiftLeft (One, And (PRTC, 0x0F), IRQ0) /* \_SB_.PCI0.LPCB.LNKC._CRS.IRQ0 */ Return (RTLC) /* \_SB_.PCI0.LPCB.LNKC._CRS.RTLC */ }
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, One, IRQ0) FindSetRightBit (IRQ0, Local0) Decrement (Local0) Store (Local0, PRTC) /* \_SB_.PCI0.LPCB.PRTC */ }
Method (_STA, 0, Serialized) // _STA: Status { If (And (PRTC, 0x80)) { Return (0x09) } Else { Return (0x0B) } } }
Device (LNKD) { Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID Name (_UID, 0x04) // _UID: Unique ID Method (_DIS, 0, Serialized) // _DIS: Disable Device { Store (0x80, PRTD) /* \_SB_.PCI0.LPCB.PRTD */ }
Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings { IRQ (Level, ActiveLow, Shared, ) {3,4,5,6,7,11,12,14,15} }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RTLD, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {} }) CreateWordField (RTLD, One, IRQ0) Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKD._CRS.IRQ0 */ ShiftLeft (One, And (PRTD, 0x0F), IRQ0) /* \_SB_.PCI0.LPCB.LNKD._CRS.IRQ0 */ Return (RTLD) /* \_SB_.PCI0.LPCB.LNKD._CRS.RTLD */ }
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, One, IRQ0) FindSetRightBit (IRQ0, Local0) Decrement (Local0) Store (Local0, PRTD) /* \_SB_.PCI0.LPCB.PRTD */ }
Method (_STA, 0, Serialized) // _STA: Status { If (And (PRTD, 0x80)) { Return (0x09) } Else { Return (0x0B) } } }
Device (LNKE) { Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID Name (_UID, 0x05) // _UID: Unique ID Method (_DIS, 0, Serialized) // _DIS: Disable Device { Store (0x80, PRTE) /* \_SB_.PCI0.LPCB.PRTE */ }
Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings { IRQ (Level, ActiveLow, Shared, ) {3,4,5,6,7,10,12,14,15} }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RTLE, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {} }) CreateWordField (RTLE, One, IRQ0) Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKE._CRS.IRQ0 */ ShiftLeft (One, And (PRTE, 0x0F), IRQ0) /* \_SB_.PCI0.LPCB.LNKE._CRS.IRQ0 */ Return (RTLE) /* \_SB_.PCI0.LPCB.LNKE._CRS.RTLE */ }
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, One, IRQ0) FindSetRightBit (IRQ0, Local0) Decrement (Local0) Store (Local0, PRTE) /* \_SB_.PCI0.LPCB.PRTE */ }
Method (_STA, 0, Serialized) // _STA: Status { If (And (PRTE, 0x80)) { Return (0x09) } Else { Return (0x0B) } } }
Device (LNKF) { Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID Name (_UID, 0x06) // _UID: Unique ID Method (_DIS, 0, Serialized) // _DIS: Disable Device { Store (0x80, PRTF) /* \_SB_.PCI0.LPCB.PRTF */ }
Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings { IRQ (Level, ActiveLow, Shared, ) {3,4,5,6,7,11,12,14,15} }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RTLF, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {} }) CreateWordField (RTLF, One, IRQ0) Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKF._CRS.IRQ0 */ ShiftLeft (One, And (PRTF, 0x0F), IRQ0) /* \_SB_.PCI0.LPCB.LNKF._CRS.IRQ0 */ Return (RTLF) /* \_SB_.PCI0.LPCB.LNKF._CRS.RTLF */ }
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, One, IRQ0) FindSetRightBit (IRQ0, Local0) Decrement (Local0) Store (Local0, PRTF) /* \_SB_.PCI0.LPCB.PRTF */ }
Method (_STA, 0, Serialized) // _STA: Status { If (And (PRTF, 0x80)) { Return (0x09) } Else { Return (0x0B) } } }
Device (LNKG) { Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID Name (_UID, 0x07) // _UID: Unique ID Method (_DIS, 0, Serialized) // _DIS: Disable Device { Store (0x80, PRTG) /* \_SB_.PCI0.LPCB.PRTG */ }
Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings { IRQ (Level, ActiveLow, Shared, ) {3,4,5,6,7,10,12,14,15} }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RTLG, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {} }) CreateWordField (RTLG, One, IRQ0) Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKG._CRS.IRQ0 */ ShiftLeft (One, And (PRTG, 0x0F), IRQ0) /* \_SB_.PCI0.LPCB.LNKG._CRS.IRQ0 */ Return (RTLG) /* \_SB_.PCI0.LPCB.LNKG._CRS.RTLG */ }
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, One, IRQ0) FindSetRightBit (IRQ0, Local0) Decrement (Local0) Store (Local0, PRTG) /* \_SB_.PCI0.LPCB.PRTG */ }
Method (_STA, 0, Serialized) // _STA: Status { If (And (PRTG, 0x80)) { Return (0x09) } Else { Return (0x0B) } } }
Device (LNKH) { Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID Name (_UID, 0x08) // _UID: Unique ID Method (_DIS, 0, Serialized) // _DIS: Disable Device { Store (0x80, PRTH) /* \_SB_.PCI0.LPCB.PRTH */ }
Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings { IRQ (Level, ActiveLow, Shared, ) {3,4,5,6,7,11,12,14,15} }) Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { Name (RTLH, ResourceTemplate () { IRQ (Level, ActiveLow, Shared, ) {} }) CreateWordField (RTLH, One, IRQ0) Store (Zero, IRQ0) /* \_SB_.PCI0.LPCB.LNKH._CRS.IRQ0 */ ShiftLeft (One, And (PRTH, 0x0F), IRQ0) /* \_SB_.PCI0.LPCB.LNKH._CRS.IRQ0 */ Return (RTLH) /* \_SB_.PCI0.LPCB.LNKH._CRS.RTLH */ }
Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings { CreateWordField (Arg0, One, IRQ0) FindSetRightBit (IRQ0, Local0) Decrement (Local0) Store (Local0, PRTH) /* \_SB_.PCI0.LPCB.PRTH */ }
Method (_STA, 0, Serialized) // _STA: Status { If (And (PRTH, 0x80)) { Return (0x09) } Else { Return (0x0B) } } }
Device (EC) { Name (_HID, EisaId ("PNP0C09") /* Embedded Controller Device */) // _HID: Hardware ID Name (_UID, Zero) // _UID: Unique ID Name (_GPE, 0x1C) // _GPE: General Purpose Events Mutex (ECLK, 0x00) OperationRegion (ERAM, EmbeddedControl, Zero, 0x0100) Field (ERAM, ByteAcc, NoLock, Preserve) { Offset (0x02), DKR1, 1, Offset (0x05), HSPA, 1, Offset (0x0C), LEDS, 8, Offset (0x0F), , 7, TBSW, 1, Offset (0x1A), DKR2, 1, Offset (0x2A), EVNT, 8, Offset (0x30), , 6, ALMT, 1, Offset (0x3A), AMUT, 1, , 3, BTEB, 1, WLEB, 1, WWEB, 1, Offset (0x3B), , 1, KBLT, 1, , 2, USPW, 1, Offset (0x4E), WAKE, 16, Offset (0x78), TMP0, 8, TMP1, 8, Offset (0x81), PAGE, 8, Offset (0xFE), , 4, DKR3, 1 }
Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings { Name (ECMD, ResourceTemplate () { IO (Decode16, 0x0062, // Range Minimum 0x0062, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0066, // Range Minimum 0x0066, // Range Maximum 0x01, // Alignment 0x01, // Length ) }) Return (ECMD) /* \_SB_.PCI0.LPCB.EC__._CRS.ECMD */ }
Method (TLED, 1, NotSerialized) { Store (Arg0, LEDS) /* \_SB_.PCI0.LPCB.EC__.LEDS */ }
Method (LED, 2, NotSerialized) { TLED (Or (Arg0, Arg1)) }
Method (_INI, 0, NotSerialized) // _INI: Initialize { }
Method (MUTE, 1, NotSerialized) { Store (Arg0, AMUT) /* \_SB_.PCI0.LPCB.EC__.AMUT */ }
Method (RADI, 1, NotSerialized) { Store (Arg0, WLEB) /* \_SB_.PCI0.LPCB.EC__.WLEB */ Store (Arg0, WWEB) /* \_SB_.PCI0.LPCB.EC__.WWEB */ Store (Arg0, BTEB) /* \_SB_.PCI0.LPCB.EC__.BTEB */ }
Method (USBP, 1, NotSerialized) { Store (Arg0, USPW) /* \_SB_.PCI0.LPCB.EC__.USPW */ }
Method (_Q13, 0, NotSerialized) // _Qxx: EC Query { Notify (SLPB, 0x80) // Status Change }
Method (_Q14, 0, NotSerialized) // _Qxx: EC Query { ^^^GFX0.INCB () }
Method (_Q15, 0, NotSerialized) // _Qxx: EC Query { ^^^GFX0.DECB () }
Method (_Q16, 0, NotSerialized) // _Qxx: EC Query { Notify (GFX0, 0x82) // Device-Specific Change }
Method (_Q26, 0, NotSerialized) // _Qxx: EC Query { Notify (AC, 0x80) // Status Change }
Method (_Q27, 0, NotSerialized) // _Qxx: EC Query { Notify (AC, 0x80) // Status Change Store (0x50, EVNT) /* \_SB_.PCI0.LPCB.EC__.EVNT */ }
Method (_Q2A, 0, NotSerialized) // _Qxx: EC Query { Notify (LID, 0x80) // Status Change }
Method (_Q2B, 0, NotSerialized) // _Qxx: EC Query { Notify (LID, 0x80) // Status Change }
Method (_Q10, 0, NotSerialized) // _Qxx: EC Query { ^HKEY.RHK (One) }
Method (_Q11, 0, NotSerialized) // _Qxx: EC Query { ^HKEY.RHK (0x02) }
Method (_Q12, 0, NotSerialized) // _Qxx: EC Query { ^HKEY.RHK (0x03) }
Method (_Q64, 0, NotSerialized) // _Qxx: EC Query { ^HKEY.RHK (0x05) }
Method (_Q65, 0, NotSerialized) // _Qxx: EC Query { ^HKEY.RHK (0x06) }
Method (_Q17, 0, NotSerialized) // _Qxx: EC Query { ^HKEY.RHK (0x08) }
Method (_Q66, 0, NotSerialized) // _Qxx: EC Query { ^HKEY.RHK (0x0A) }
Method (_Q6A, 0, NotSerialized) // _Qxx: EC Query { ^HKEY.RHK (0x1B) }
Method (_Q1A, 0, NotSerialized) // _Qxx: EC Query { ^HKEY.RHK (0x0B) }
Method (_Q1B, 0, NotSerialized) // _Qxx: EC Query { ^HKEY.RHK (0x0C) }
Method (_Q62, 0, NotSerialized) // _Qxx: EC Query { ^HKEY.RHK (0x0D) }
Method (_Q60, 0, NotSerialized) // _Qxx: EC Query { ^HKEY.RHK (0x0E) }
Method (_Q61, 0, NotSerialized) // _Qxx: EC Query { ^HKEY.RHK (0x0F) }
Method (_Q1F, 0, NotSerialized) // _Qxx: EC Query { ^HKEY.RHK (0x12) }
Method (_Q67, 0, NotSerialized) // _Qxx: EC Query { ^HKEY.RHK (0x13) }
Method (_Q63, 0, NotSerialized) // _Qxx: EC Query { ^HKEY.RHK (0x14) }
Method (_Q19, 0, NotSerialized) // _Qxx: EC Query { ^HKEY.RHK (0x18) }
Method (_Q1C, 0, NotSerialized) // _Qxx: EC Query { ^HKEY.RHK (0x19) }
Method (_Q1D, 0, NotSerialized) // _Qxx: EC Query { ^HKEY.RHK (0x1A) }
Method (_Q5C, 0, NotSerialized) // _Qxx: EC Query { ^HKEY.RTAB (0x0B) }
Method (_Q5D, 0, NotSerialized) // _Qxx: EC Query { ^HKEY.RTAB (0x0C) }
Method (_Q5E, 0, NotSerialized) // _Qxx: EC Query { ^HKEY.RTAB (0x09) }
Method (_Q5F, 0, NotSerialized) // _Qxx: EC Query { ^HKEY.RTAB (0x0A) }
Device (HKEY) { Name (_HID, EisaId ("IBM0068")) // _HID: Hardware ID Name (BTN, Zero) Name (BTAB, Zero) Name (DHKN, 0x080C) Name (EMSK, Zero) Name (ETAB, Zero) Name (EN, Zero) Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) }
Method (MHKP, 0, NotSerialized) { Store (BTN, Local0) If (LNotEqual (Local0, Zero)) { Store (Zero, BTN) /* \_SB_.PCI0.LPCB.EC__.HKEY.BTN_ */ Add (Local0, 0x1000, Local0) Return (Local0) }
Store (BTAB, Local0) If (LNotEqual (Local0, Zero)) { Store (Zero, BTAB) /* \_SB_.PCI0.LPCB.EC__.HKEY.BTAB */ Add (Local0, 0x5000, Local0) Return (Local0) }
Return (Zero) }
Method (RHK, 1, NotSerialized) { ShiftLeft (One, Subtract (Arg0, One), Local0) If (And (EMSK, Local0)) { Store (Arg0, BTN) /* \_SB_.PCI0.LPCB.EC__.HKEY.BTN_ */ Notify (HKEY, 0x80) // Status Change } }
Method (RTAB, 1, NotSerialized) { ShiftLeft (One, Subtract (Arg0, One), Local0) If (And (ETAB, Local0)) { Store (Arg0, BTAB) /* \_SB_.PCI0.LPCB.EC__.HKEY.BTAB */ Notify (HKEY, 0x80) // Status Change } }
Method (MHKC, 1, NotSerialized) { If (Arg0) { Store (DHKN, EMSK) /* \_SB_.PCI0.LPCB.EC__.HKEY.EMSK */ Store (Ones, ETAB) /* \_SB_.PCI0.LPCB.EC__.HKEY.ETAB */ } Else { Store (Zero, EMSK) /* \_SB_.PCI0.LPCB.EC__.HKEY.EMSK */ Store (Zero, ETAB) /* \_SB_.PCI0.LPCB.EC__.HKEY.ETAB */ }
Store (Arg0, EN) /* \_SB_.PCI0.LPCB.EC__.HKEY.EN__ */ }
Method (MHKM, 2, NotSerialized) { If (LLessEqual (Arg0, 0x20)) { ShiftLeft (One, Subtract (Arg0, One), Local0) If (Arg1) { Or (DHKN, Local0, DHKN) /* \_SB_.PCI0.LPCB.EC__.HKEY.DHKN */ } Else { And (DHKN, Not (Local0), DHKN) /* \_SB_.PCI0.LPCB.EC__.HKEY.DHKN */ }
If (EN) { Store (DHKN, EMSK) /* \_SB_.PCI0.LPCB.EC__.HKEY.EMSK */ } } }
Method (MHKA, 0, NotSerialized) { Return (0x07FFFFFF) }
Method (MHKG, 0, NotSerialized) { Return (ShiftLeft (TBSW, 0x03)) }
Method (SSMS, 1, NotSerialized) { Store (Arg0, ALMT) /* \_SB_.PCI0.LPCB.EC__.ALMT */ }
Method (MMTS, 1, NotSerialized) { If (Arg0) { TLED (0x8E) } Else { TLED (0x0E) } }
Method (MHKV, 0, NotSerialized) { Return (0x0100) } }
Field (ERAM, ByteAcc, NoLock, Preserve) { Offset (0x46), , 4, HPAC, 1 }
Device (AC) { Name (_HID, "ACPI0003" /* Power Source Device */) // _HID: Hardware ID Name (_UID, Zero) // _UID: Unique ID Name (_PCL, Package (0x01) // _PCL: Power Consumer List { _SB }) Method (_PSR, 0, NotSerialized) // _PSR: Power Source { Return (HPAC) /* \_SB_.PCI0.LPCB.EC__.HPAC */ }
Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } }
Field (ERAM, ByteAcc, NoLock, Preserve) { Offset (0x38), B0ST, 4, , 1, B0CH, 1, B0DI, 1, B0PR, 1, B1ST, 4, , 1, B1CH, 1, B1DI, 1, B1PR, 1 }
Field (ERAM, ByteAcc, NoLock, Preserve) { Offset (0xA0), BARC, 16, BAFC, 16, Offset (0xA8), BAPR, 16, BAVO, 16 }
Field (ERAM, ByteAcc, NoLock, Preserve) { Offset (0xA0), , 15, BAMA, 1 }
Field (ERAM, ByteAcc, NoLock, Preserve) { Offset (0xA0), BADC, 16, BADV, 16, Offset (0xA6), Offset (0xA8), Offset (0xAA), BASN, 16 }
Field (ERAM, ByteAcc, NoLock, Preserve) { Offset (0xA0), BATY, 32 }
Field (ERAM, ByteAcc, NoLock, Preserve) { Offset (0xA0), BAOE, 128 }
Field (ERAM, ByteAcc, NoLock, Preserve) { Offset (0xA0), BANA, 128 }
Method (BPAG, 1, NotSerialized) { Store (Arg0, PAGE) /* \_SB_.PCI0.LPCB.EC__.PAGE */ }
Method (BSTA, 4, NotSerialized) { Acquire (ECLK, 0xFFFF) Store (Zero, Local0) BPAG (Or (One, Arg0)) Store (BAMA, Local1) BPAG (Arg0) Store (BAPR, Local2) If (Arg2) { Or (0x02, Local0, Local0) } Else { If (Arg3) { Or (One, Local0, Local0) Subtract (0x00010000, Local2, Local2) } Else { Store (Zero, Local2) } }
If (LGreaterEqual (Local2, 0x8000)) { Store (Zero, Local2) }
Store (Local0, Index (Arg1, Zero)) If (Local1) { Multiply (BARC, 0x0A, Index (Arg1, 0x02)) Multiply (Local2, BAVO, Local2) Divide (Local2, 0x03E8, , Index (Arg1, One)) } Else { Store (BARC, Index (Arg1, 0x02)) Store (Local2, Index (Arg1, One)) }
Store (BAVO, Index (Arg1, 0x03)) Release (ECLK) Return (Arg1) }
Method (BINF, 2, NotSerialized) { Acquire (ECLK, 0xFFFF) BPAG (Or (One, Arg1)) XOr (BAMA, One, Index (Arg0, Zero)) Store (BAMA, Local0) BPAG (Arg1) Store (BAFC, Local2) BPAG (Or (0x02, Arg1)) Store (BADC, Local1) If (Local0) { Multiply (Local1, 0x0A, Local1) Multiply (Local2, 0x0A, Local2) }
Store (Local1, Index (Arg0, One)) Store (Local2, Index (Arg0, 0x02)) Store (BADV, Index (Arg0, 0x04)) Divide (Local2, 0x14, Local0, Index (Arg0, 0x05)) Store (BASN, Local0) Name (SERN, Buffer (0x06) { " " }) Store (0x04, Local1) While (Local0) { Divide (Local0, 0x0A, Local2, Local0) Add (Local2, 0x30, Index (SERN, Local1)) Decrement (Local1) }
Store (SERN, Index (Arg0, 0x0A)) BPAG (Or (0x04, Arg1)) Name (TYPE, Buffer (0x05) { 0x00, 0x00, 0x00, 0x00, 0x00 /* ..... */ }) Store (BATY, TYPE) /* \_SB_.PCI0.LPCB.EC__.BINF.TYPE */ Store (TYPE, Index (Arg0, 0x0B)) BPAG (Or (0x05, Arg1)) Store (BAOE, Index (Arg0, 0x0C)) BPAG (Or (0x06, Arg1)) Store (BANA, Index (Arg0, 0x09)) Release (ECLK) Return (Arg0) }
Device (BAT0) { Name (_HID, EisaId ("PNP0C0A") /* Control Method Battery */) // _HID: Hardware ID Name (_UID, Zero) // _UID: Unique ID Name (_PCL, Package (0x01) // _PCL: Power Consumer List { _SB }) Name (BATS, Package (0x0D) { Zero, 0xFFFFFFFF, 0xFFFFFFFF, One, 0x2A30, Zero, 0xC8, One, One, "", "", "", "" }) Method (_BIF, 0, NotSerialized) // _BIF: Battery Information { Return (BINF (BATS, Zero)) }
Name (BATI, Package (0x04) { Zero, Zero, Zero, Zero }) Method (_BST, 0, NotSerialized) // _BST: Battery Status { If (B0PR) { Return (BSTA (Zero, BATI, B0CH, B0DI)) } Else { Return (Package (0x04) { Zero, Zero, Zero, Zero }) } }
Method (_STA, 0, NotSerialized) // _STA: Status { If (B0PR) { Return (0x1F) } Else { Return (0x0F) } } }
Device (BAT1) { Name (_HID, EisaId ("PNP0C0A") /* Control Method Battery */) // _HID: Hardware ID Name (_UID, Zero) // _UID: Unique ID Name (_PCL, Package (0x01) // _PCL: Power Consumer List { _SB }) Name (BATS, Package (0x0D) { Zero, 0xFFFFFFFF, 0xFFFFFFFF, One, 0x2A30, Zero, 0xC8, One, One, "", "", "", "" }) Method (_BIF, 0, NotSerialized) // _BIF: Battery Information { Return (BINF (BATS, 0x10)) }
Name (BATI, Package (0x04) { Zero, Zero, Zero, Zero }) Method (_BST, 0, NotSerialized) // _BST: Battery Status { If (B1PR) { Return (BSTA (0x10, BATI, B1CH, B1DI)) } Else { Return (Package (0x04) { Zero, Zero, Zero, Zero }) } }
Method (_STA, 0, NotSerialized) // _STA: Status { If (B1PR) { Return (0x1F) } Else { Return (0x0F) } } }
Method (_Q24, 0, NotSerialized) // _Qxx: EC Query { Notify (BAT0, 0x80) // Status Change }
Method (_Q25, 0, NotSerialized) // _Qxx: EC Query { Notify (BAT1, 0x80) // Status Change }
Method (_Q4A, 0, NotSerialized) // _Qxx: EC Query { Notify (BAT0, 0x81) // Information Change }
Method (_Q4B, 0, NotSerialized) // _Qxx: EC Query { Notify (BAT0, 0x80) // Status Change }
Method (_Q4C, 0, NotSerialized) // _Qxx: EC Query { Notify (BAT1, 0x81) // Information Change }
Method (_Q4D, 0, NotSerialized) // _Qxx: EC Query { Notify (BAT1, 0x80) // Status Change }
Field (ERAM, ByteAcc, NoLock, Preserve) { Offset (0x32), , 4, WKFN, 1, Offset (0x83), FNKY, 8 }
Device (SLPB) { Name (_HID, EisaId ("PNP0C0E") /* Sleep Button Device */) // _HID: Hardware ID Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (Package (0x02) { 0x18, 0x03 }) }
Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake { If (Arg0) { Store (0x06, FNKY) /* \_SB_.PCI0.LPCB.EC__.FNKY */ Store (One, WKFN) /* \_SB_.PCI0.LPCB.EC__.WKFN */ } Else { Store (Zero, FNKY) /* \_SB_.PCI0.LPCB.EC__.FNKY */ Store (Zero, WKFN) /* \_SB_.PCI0.LPCB.EC__.WKFN */ } } }
Field (ERAM, ByteAcc, NoLock, Preserve) { Offset (0x32), , 2, WKLD, 1, Offset (0x46), , 2, LIDS, 1 }
Device (LID) { Name (_HID, "PNP0C0D" /* Lid Device */) // _HID: Hardware ID Method (_LID, 0, NotSerialized) // _LID: Lid Status { Return (LIDS) /* \_SB_.PCI0.LPCB.EC__.LIDS */ }
Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake { Return (Package (0x02) { 0x18, 0x03 }) }
Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake { If (Arg0) { Store (One, WKLD) /* \_SB_.PCI0.LPCB.EC__.WKLD */ } Else { Store (Zero, WKLD) /* \_SB_.PCI0.LPCB.EC__.WKLD */ } } }
Field (ERAM, ByteAcc, NoLock, Preserve) { Offset (0x06), SNDS, 8 }
Method (BEEP, 1, NotSerialized) { Store (Arg0, SNDS) /* \_SB_.PCI0.LPCB.EC__.SNDS */ }
Scope (\_TZ) { Method (C2K, 1, NotSerialized) { Multiply (Arg0, 0x0A, Local0) Add (Local0, 0x0AAC, Local0) If (LLessEqual (Local0, 0x0AAC)) { Return (0x0BB8) }
If (LGreater (Local0, 0x0FAC)) { Return (0x0BB8) }
Return (Local0) }
ThermalZone (THM0) { Method (_CRT, 0, NotSerialized) // _CRT: Critical Temperature { Return (C2K (0x7F)) }
Method (_TMP, 0, NotSerialized) // _TMP: Temperature { Return (C2K (\_SB.PCI0.LPCB.EC.TMP0)) } }
ThermalZone (THM1) { Method (_CRT, 0, NotSerialized) // _CRT: Critical Temperature { Return (C2K (0x63)) }
Method (_PSV, 0, NotSerialized) // _PSV: Passive Temperature { Return (C2K (0x5E)) }
Method (_TMP, 0, NotSerialized) // _TMP: Temperature { Return (C2K (\_SB.PCI0.LPCB.EC.TMP1)) } } }
Scope (\_SI) { Method (_SST, 1, NotSerialized) // _SST: System Status { If (LEqual (Arg0, Zero)) { \_SB.PCI0.LPCB.EC.TLED (Zero) \_SB.PCI0.LPCB.EC.TLED (0x07) }
If (LEqual (Arg0, One)) { \_SB.PCI0.LPCB.EC.TLED (0x80) \_SB.PCI0.LPCB.EC.TLED (0x07) }
If (LEqual (Arg0, 0x02)) { \_SB.PCI0.LPCB.EC.TLED (0x80) \_SB.PCI0.LPCB.EC.TLED (0xC7) }
If (LEqual (Arg0, 0x03)) { \_SB.PCI0.LPCB.EC.TLED (0xA0) \_SB.PCI0.LPCB.EC.TLED (0x87) } } } }
Device (DMAC) { Name (_HID, EisaId ("PNP0200") /* PC-class DMA Controller */) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x0000, // Range Minimum 0x0000, // Range Maximum 0x01, // Alignment 0x20, // Length ) IO (Decode16, 0x0081, // Range Minimum 0x0081, // Range Maximum 0x01, // Alignment 0x11, // Length ) IO (Decode16, 0x0093, // Range Minimum 0x0093, // Range Maximum 0x01, // Alignment 0x0D, // Length ) IO (Decode16, 0x00C0, // Range Minimum 0x00C0, // Range Maximum 0x01, // Alignment 0x20, // Length ) DMA (Compatibility, NotBusMaster, Transfer8_16, ) {4} }) }
Device (FWH) { Name (_HID, EisaId ("INT0800") /* Intel 82802 Firmware Hub Device */) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { Memory32Fixed (ReadOnly, 0xFF000000, // Address Base 0x01000000, // Address Length ) }) }
Device (HPET) { Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // _HID: Hardware ID Name (_CID, EisaId ("PNP0C01") /* System Board */) // _CID: Compatible ID Name (BUF0, ResourceTemplate () { Memory32Fixed (ReadOnly, 0xFED00000, // Address Base 0x00000400, // Address Length _Y01) }) Method (_STA, 0, NotSerialized) // _STA: Status { If (HPTE) { If (LGreaterEqual (OSYS, 0x07D1)) { Return (0x0F) } Else { Return (0x0B) } }
Return (Zero) }
Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings { If (HPTE) { CreateDWordField (BUF0, \_SB.PCI0.LPCB.HPET._Y01._BAS, HPT0) // _BAS: Base Address If (LEqual (HPAS, One)) { Store (0xFED01000, HPT0) /* \_SB_.PCI0.LPCB.HPET._CRS.HPT0 */ }
If (LEqual (HPAS, 0x02)) { Store (0xFED02000, HPT0) /* \_SB_.PCI0.LPCB.HPET._CRS.HPT0 */ }
If (LEqual (HPAS, 0x03)) { Store (0xFED03000, HPT0) /* \_SB_.PCI0.LPCB.HPET._CRS.HPT0 */ } }
Return (BUF0) /* \_SB_.PCI0.LPCB.HPET.BUF0 */ } }
Device (PIC) { Name (_HID, EisaId ("PNP0000") /* 8259-compatible Programmable Interrupt Controller */) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x0020, // Range Minimum 0x0020, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0024, // Range Minimum 0x0024, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0028, // Range Minimum 0x0028, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x002C, // Range Minimum 0x002C, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0030, // Range Minimum 0x0030, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0034, // Range Minimum 0x0034, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0038, // Range Minimum 0x0038, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x003C, // Range Minimum 0x003C, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00A0, // Range Minimum 0x00A0, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00A4, // Range Minimum 0x00A4, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00A8, // Range Minimum 0x00A8, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00AC, // Range Minimum 0x00AC, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00B0, // Range Minimum 0x00B0, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00B4, // Range Minimum 0x00B4, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00B8, // Range Minimum 0x00B8, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x00BC, // Range Minimum 0x00BC, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x04D0, // Range Minimum 0x04D0, // Range Maximum 0x01, // Alignment 0x02, // Length ) IRQNoFlags () {2} }) }
Device (MATH) { Name (_HID, EisaId ("PNP0C04") /* x87-compatible Floating Point Processing Unit */) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x00F0, // Range Minimum 0x00F0, // Range Maximum 0x01, // Alignment 0x01, // Length ) IRQNoFlags () {13} }) }
Device (LDRC) { Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID Name (_UID, 0x02) // _UID: Unique ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x002E, // Range Minimum 0x002E, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x004E, // Range Minimum 0x004E, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0061, // Range Minimum 0x0061, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0063, // Range Minimum 0x0063, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0065, // Range Minimum 0x0065, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0067, // Range Minimum 0x0067, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0080, // Range Minimum 0x0080, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0092, // Range Minimum 0x0092, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x00B2, // Range Minimum 0x00B2, // Range Maximum 0x01, // Alignment 0x02, // Length ) IO (Decode16, 0x0800, // Range Minimum 0x0800, // Range Maximum 0x01, // Alignment 0x10, // Length ) IO (Decode16, 0x0500, // Range Minimum 0x0500, // Range Maximum 0x01, // Alignment 0x80, // Length ) IO (Decode16, 0x0480, // Range Minimum 0x0480, // Range Maximum 0x01, // Alignment 0x40, // Length ) }) }
Device (RTC) { Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x0070, // Range Minimum 0x0070, // Range Maximum 0x01, // Alignment 0x08, // Length ) }) }
Device (TIMR) { Name (_HID, EisaId ("PNP0100") /* PC-class System Timer */) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x0040, // Range Minimum 0x0040, // Range Maximum 0x01, // Alignment 0x04, // Length ) IO (Decode16, 0x0050, // Range Minimum 0x0050, // Range Maximum 0x10, // Alignment 0x04, // Length ) IRQNoFlags () {0} }) }
Device (PS2K) { Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID Name (_CID, EisaId ("PNP030B")) // _CID: Compatible ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IO (Decode16, 0x0060, // Range Minimum 0x0060, // Range Maximum 0x01, // Alignment 0x01, // Length ) IO (Decode16, 0x0064, // Range Minimum 0x0064, // Range Maximum 0x01, // Alignment 0x01, // Length ) IRQ (Edge, ActiveHigh, Exclusive, ) {1} }) Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } }
Device (PS2M) { Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */) // _HID: Hardware ID Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { IRQ (Edge, ActiveHigh, Exclusive, ) {12} }) Method (_STA, 0, NotSerialized) // _STA: Status { Return (0x0F) } } }
Device (PATA) { Name (_ADR, 0x001F0001) // _ADR: Address Device (PRID) { Name (_ADR, Zero) // _ADR: Address Method (_GTM, 0, NotSerialized) // _GTM: Get Timing Mode { Name (PBUF, Buffer (0x14) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */ /* 0010 */ 0x00, 0x00, 0x00, 0x00 /* .... */ }) CreateDWordField (PBUF, Zero, PIO0) CreateDWordField (PBUF, 0x04, DMA0) CreateDWordField (PBUF, 0x08, PIO1) CreateDWordField (PBUF, 0x0C, DMA1) CreateDWordField (PBUF, 0x10, FLAG) Return (PBUF) /* \_SB_.PCI0.PATA.PRID._GTM.PBUF */ }
Method (_STM, 3, NotSerialized) // _STM: Set Timing Mode { CreateDWordField (Arg0, Zero, PIO0) CreateDWordField (Arg0, 0x04, DMA0) CreateDWordField (Arg0, 0x08, PIO1) CreateDWordField (Arg0, 0x0C, DMA1) CreateDWordField (Arg0, 0x10, FLAG) }
Device (DSK0) { Name (_ADR, Zero) // _ADR: Address }
Device (DSK1) { Name (_ADR, One) // _ADR: Address } } }
Device (SATA) { Name (_ADR, 0x001F0002) // _ADR: Address Device (PRID) { Name (_ADR, Zero) // _ADR: Address Method (_GTM, 0, NotSerialized) // _GTM: Get Timing Mode { Name (PBUF, Buffer (0x14) { /* 0000 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ........ */ /* 0010 */ 0x00, 0x00, 0x00, 0x00 /* .... */ }) CreateDWordField (PBUF, Zero, PIO0) CreateDWordField (PBUF, 0x04, DMA0) CreateDWordField (PBUF, 0x08, PIO1) CreateDWordField (PBUF, 0x0C, DMA1) CreateDWordField (PBUF, 0x10, FLAG) Return (PBUF) /* \_SB_.PCI0.SATA.PRID._GTM.PBUF */ }
Method (_STM, 3, NotSerialized) // _STM: Set Timing Mode { CreateDWordField (Arg0, Zero, PIO0) CreateDWordField (Arg0, 0x04, DMA0) CreateDWordField (Arg0, 0x08, PIO1) CreateDWordField (Arg0, 0x0C, DMA1) CreateDWordField (Arg0, 0x10, FLAG) }
Device (DSK0) { Name (_ADR, Zero) // _ADR: Address }
Device (DSK1) { Name (_ADR, One) // _ADR: Address } } }
Device (SBUS) { Name (_ADR, 0x001F0003) // _ADR: Address } } }
Name (_S0, Package (0x04) // _S0_: S0 System State { Zero, Zero, Zero, Zero }) Name (_S3, Package (0x04) // _S3_: S3 System State { 0x05, 0x05, Zero, Zero }) Name (_S4, Package (0x04) // _S4_: S4 System State { 0x06, 0x06, Zero, Zero }) Name (_S5, Package (0x04) // _S5_: S5 System State { 0x07, 0x07, Zero, Zero }) Scope (_SB) { OperationRegion (DLPC, SystemIO, 0x164C, One) Field (DLPC, ByteAcc, NoLock, Preserve) { , 3, DSTA, 1 }
Device (DOCK) { Name (_HID, "ACPI0003" /* Power Source Device */) // _HID: Hardware ID Name (_UID, Zero) // _UID: Unique ID Name (_PCL, Package (0x01) // _PCL: Power Consumer List { _SB }) Method (_DCK, 1, NotSerialized) // _DCK: Dock Present { If (Arg0) { TRAP (One) } Else { TRAP (0x02) }
XOr (Arg0, DSTA, Local0) Return (Local0) }
Method (_STA, 0, NotSerialized) // _STA: Status { Return (DSTA) /* \_SB_.DSTA */ } } }
Scope (_SB.PCI0.LPCB.EC) { Method (_Q18, 0, NotSerialized) // _Qxx: EC Query { Notify (DOCK, 0x03) // Eject Request }
Method (_Q50, 0, NotSerialized) // _Qxx: EC Query { Notify (DOCK, 0x03) // Eject Request }
Method (_Q58, 0, NotSerialized) // _Qxx: EC Query { Notify (DOCK, Zero) // Bus Check } } }
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