[lkml]   [2017]   [Dec]   [30]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
Messages in this thread
SubjectRe: x86/pti: smp_processor_id() called while preemptible in resume-from-sleep
On Sat, 30 Dec 2017, Linus Torvalds wrote:
> On Sat, Dec 30, 2017 at 10:20 AM, Thomas Gleixner <> wrote:
> The __native_flush_tlb() function looks _very_ broken.
> It does:
> invalidate_user_asid(this_cpu_read(cpu_tlbstate.loaded_mm_asid));
> /*
> * If current->mm == NULL then we borrow a mm which may change
> * during a task switch and therefore we must not be preempted
> * while we write CR3 back:
> */
> preempt_disable();
> native_write_cr3(__native_read_cr3());
> preempt_enable();
> but why is that preempt-disabled region only around the cr3 write? The
> invalidate_user_asid() logic seems to be very CPU-sensitive too.
> And even if there is some reason why invalidate_user_asid() really can
> do multiple different percpu accesses and it doesn't matter whether
> the thread is bouncing around on different cpu's while it does it,
> there doesn't seem any _reason_ not to just extend the preempt-disable
> over the whole series.
> It really looks strange how it does multiple reads (and then a final
> write!) to percpu state, when the cpu can change in between.
> So I'd suggest moving the preempt_disable() up to the top of that
> function,

That preempt_disable()/enable() was added with:

commit 5cf0791da5c162ebc14b01eb01631cfa7ed4fa6e
Author: Sebastian Andrzej Siewior <>
Date: Fri Aug 5 15:37:39 2016 +0200

x86/mm: Disable preemption during CR3 read+write

So we need to look at that scenario before removing it.



 \ /
  Last update: 2017-12-30 21:28    [W:0.065 / U:0.140 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site