lkml.org 
[lkml]   [2017]   [Dec]   [19]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
From
Subject[PATCH 0/2] ti-pipe3: PCIe x2 lane mode configuration in dra72
Date
DRA72 uses the same pipe3 PHY for the 2nd lane of PCIE and USB3 PHY.
By default it is configured to be used as USB3 PHY and some special
configuration has to be done inorder to use it for the 2nd lane of PCIE.

This series adds a new dt property and the configuration required to
enable 2nd lane of PCIE.

Kishon Vijay Abraham I (2):
dt-bindings: phy: ti-pipe3: Add dt binding to use USB3 PHY for PCIe
phy: ti-pipe3: configure usb3 phy to be used as pcie phy

Documentation/devicetree/bindings/phy/ti-phy.txt | 2 +
drivers/phy/ti/phy-ti-pipe3.c | 47 +++++++++++++++++++++---
2 files changed, 43 insertions(+), 6 deletions(-)

--
2.11.0

\
 
 \ /
  Last update: 2017-12-19 10:46    [W:0.070 / U:3.008 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site