lkml.org 
[lkml]   [2017]   [Nov]   [3]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: [PATCH v2 2/5] perf/x86: add PERF_SAMPLE_SKID_IP support for X86 PEBS
On Thu, Nov 02, 2017 at 11:15:56AM -0700, Stephane Eranian wrote:
> From: Stephane Eranian <eranian@gmail.com>
>
> This atch adds support for SKID_IP to Intel x86 processors in PEBS
> mode.

s/atch/patch/

>
> Signed-off-by: Stephane Eranian <eranian@google.com>
> ---
> arch/x86/events/intel/ds.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
> index e1965e5ff570..b7afdf88f441 100644
> --- a/arch/x86/events/intel/ds.c
> +++ b/arch/x86/events/intel/ds.c
> @@ -1189,6 +1189,13 @@ static void setup_pebs_sample_data(struct perf_event *event,
> x86_pmu.intel_cap.pebs_format >= 1)
> data->addr = pebs->dla;
>
> + /*
> + * unmodified, skid IP which is guaranteed to be the next
> + * dyanmic instruction
> + */

s/dyanmic/dynamic/

jirka

> + if (sample_type & PERF_SAMPLE_SKID_IP)
> + data->skid_ip = pebs->ip;
> +
> if (x86_pmu.intel_cap.pebs_format >= 2) {
> /* Only set the TSX weight when no memory weight. */
> if ((sample_type & PERF_SAMPLE_WEIGHT) && !fll)
> --
> 2.7.4
>

\
 
 \ /
  Last update: 2017-11-03 16:05    [W:0.109 / U:8.560 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site