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SubjectRe: [PATCH] platform/x86: intel_pmc_core: Add Package C-states residency info
On Sat, Aug 19, 2017 at 2:23 AM, Rajat Jain <> wrote:
> On Fri, Aug 18, 2017 at 10:47 AM, Rajneesh Bhardwaj
> <> wrote:
>> On Fri, Aug 18, 2017 at 08:17:32PM +0300, Andy Shevchenko wrote:
>>> On Fri, Aug 18, 2017 at 5:58 PM, Rajneesh Bhardwaj
>>> <> wrote:
>>> > On Fri, Aug 18, 2017 at 03:57:34PM +0300, Andy Shevchenko wrote:
>>> >> On Fri, Aug 18, 2017 at 3:37 PM, Rajneesh Bhardwaj
>>> >> <> wrote:

>>> > This is needed to enhance the S0ix failure debug capabilities from within
>>> > the kernel. On ChromeOS we have S0ix failsafe kernel framework that is used
>>> > to validate S0ix and report the blockers in case of a failure.
>>> >
>>> (It's not part of upstream)
>> Sorry i sent an older link. There are fresh attempts to get this into
>> mainline kernel and looks like there is a traction for it.
>> Package C-state (PC10) validation is discussed there.
> Yes, Derek has been trying to get it up streamed, and is currently
> taking care of the comments. One of the comments Rafael Wysocki had
> (, was that getting to PC10 takes
> care of large amount of power savings, and PC10 is a logical milestone
> to track / validate as it validates the north complex power state. To
> do that we need an API to get the PC10 counter.

So, how many ways we have to get that counter?

From HW prospective; from Linux kernel prospective; from user space prospective.

> I do agree that an exposed API needs to have a user code that uses the
> API. In this case it seems to be a chicken and egg problem i.e. the
> S0ix failsafe framework (
> needs this API, and the API needs a user (failsafe framework) for it
> to be accepted?

So, Derek's patch as I can see didn't made upstream and the whole
activity seems staled.

I'm going to mark this as Rejected. Whenever it would be new approach
feel free to send a new version.

With Best Regards,
Andy Shevchenko

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