[lkml]   [2016]   [Dec]   [4]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
Messages in this thread
SubjectRe: [SPCR] mmio32 iotype access requirements for X-Gene 8250(_dw) UART
On Sat, Dec 3, 2016 at 12:33 PM, Jon Masters <> wrote:
> Hi Mark,
> On 12/03/2016 12:15 PM, Mark Salter wrote:
>> On Sat, 2016-12-03 at 05:06 -0500, Jon Masters wrote:
>>> There is a broader problem with X-Gene SPCR support. The problem is
>>> that the 16550 UART in X-Gene requires the 32-bit access quirk (the
>>> iotype is set to UPIO_MEM32 for the APMC0D08 device). This means
>>> that when univ8250_console_match runs later, it will compare the
>>> iotype (MEM32) with the type previously registered with the
>>> kernel when the earlycon setup the preferred console.
>> Linaro has a kernel patch which looks at the bit_width field of the
>> port address:
>> Author: Aleksey Makarov <>
>> Date: Thu Apr 28 19:52:38 2016 +0300
>> serial: SPCR: check bit width for the 16550 UART
>> The SPCR in 3.06.25 firmware has a bit_width field set to 32 and with the
>> above patch, I don't need to use console=. But HP firmware on m400 sets
>> bit width to 8 so that needs a firmware fix to work with above.

Will this patch be posted for upstream?

> Indeed, thanks. Graeme also mentioned that last night. I think this
> a good solution for the moment, but still that it makes sense to
> have a new 16650 UART type defined in the DBG2 spec for those
> requiring 32-bit access (to mirror the type D for pl011). I
> heard back from Microsoft this morning that they're looking.

Yes, thanks, Jon. It will be nice to have a new 16550 UART type for
those requiring 32-bit access.

> Jon.
> --
> Computer Architect | Sent from my Fedora powered laptop
Duc Dang.

 \ /
  Last update: 2016-12-04 11:42    [W:0.081 / U:1.748 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site