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SubjectRe: [PATCH v3] x86/cpuid: expose AVX512_4VNNIW and AVX512_4FMAPS features to kvm guest
On Fri, Nov 04, 2016 at 11:52:35AM +0100, Borislav Petkov wrote:
> Please CC me on your future submissions, thanks.
>

Sure.

> On Fri, Nov 04, 2016 at 03:07:19PM +0800, He Chen wrote:
> > The spec can be found in Intel Software Developer Manual or in
> > Instruction Set Extensions Programming Reference.
>
> This commit message is completely useless. Write commit messages in
> the way as if you're explaining to another person *why* this change is
> needed and that other person doesn't have an idea what you're doing.
>

My carelessness, will improve it in next patch. Thanks for kindly
advices.

> > Changes in v3:
> > * add a helper in scattered.c to get scattered leaf.
>
> The modification to scattered et al without the kvm use should be a
> separate patch.
>

Agreed.

> > * Capabilities of Intel PT hardware, such as number of address bits or
> > * supported output schemes, are cached and exported to userspace as "caps"
> > diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h
> > index 984a7bf..47978b7 100644
> > --- a/arch/x86/include/asm/processor.h
> > +++ b/arch/x86/include/asm/processor.h
> > @@ -137,6 +137,13 @@ struct cpuinfo_x86 {
> > u32 microcode;
> > };
> >
> > +enum cpuid_regs_idx {
>
> cpuid_regs was just fine.
>

It should be, but I found it conflcts with `struct cpuid_regs` in
`arch/x86/kernel/cpuid.c` since it got exported.

Thanks,
-He

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