Messages in this thread |  | | From | Jagan Teki <> | Date | Sat, 22 Oct 2016 16:30:35 +0530 | Subject | Re: [PATCH v2 0/9] mtd: spi-nor: parse SFDP tables to setup (Q)SPI memories |
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On Wed, Oct 5, 2016 at 5:30 PM, Cyrille Pitchen <cyrille.pitchen@atmel.com> wrote: > Hi all, > > This series extends support of SPI protocols to new protocols such as > SPI x-2-2 and SPI x-4-4. Also spi_nor_scan() tries now to select the right > op codes, timing parameters (number of mode and dummy cycles) and erase > sector size by parsing the Serial Flash Discoverable Parameter (SFDP) > tables, when available, as defined in the JEDEC JESD216 specifications. > > When SFDP tables are not available, legacy settings are still used for > backward compatibility (SPI and earlier QSPI memories). > > Support of SPI memories >128Mbits is also improved by using the 4byte > address instruction set, when available. Using those dedicated op codes > is stateless as opposed to enter the 4byte address mode, hence a better > compatibility with some boot loaders which expect to use 3byte address > op codes.
The memories which are > 128Mbits should have 4-bytes addressing support based on my experience, do you think BAR is also required atleast from spi-nor side?
thanks! -- Jagan Teki Free Software Engineer | www.openedev.com U-Boot, Linux | Upstream Maintainer Hyderabad, India.
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