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Subject[RFC 00/13] x86/mm: PCID and INVPCID
Date
Here's my PCID and INVPCID work-in-progress.  It seems to work well
enough to play with it. (That is, I'm not aware of anything wrong
with it, although it may eat your data.)

PCID and INVPCID use are orthogonal here. INVPCID is a
straightforward speedup for global TLB flushes. Other than that, I
don't use INVPCID at all, since it seems slower than just
manipulating CR3 carefully, at least on my Skylake laptop.

Please play around and suggest (and run?) good benchmarks. It seems
to save around 100ns on cross-process context switches for me.
Unfortunately, we suck at context switches in general, so this is,
at best, a little over a 10% speedup. Most of the time is spent in
the scheduler, not in arch code.

Andy Lutomirski (13):
x86/paravirt: Turn KASAN off for parvirt.o
x86/mm: Add INVPCID helpers
x86/mm: Add a noinvpcid option to turn off INVPCID
x86/mm: If INVPCID is available, use it to flush global mappings
x86/mm: Add barriers and document switch_mm-vs-flush synchronization
x86/mm: Disable PCID on 32-bit kernels
x86/mm: Add nopcid to turn off PCID
x86/mm: Teach CR3 readers about PCID
x86/mm: Disable interrupts when flushing the TLB using CR3
x86/mm: Factor out remote TLB flushing
x86/mm: Build arch/x86/mm/tlb.c even on !SMP
x86/mm: Uninline switch_mm
x86/mm: Try to preserve old TLB entries using PCID

Documentation/kernel-parameters.txt | 4 +
arch/x86/include/asm/disabled-features.h | 4 +-
arch/x86/include/asm/mmu.h | 7 +-
arch/x86/include/asm/mmu_context.h | 62 +-----
arch/x86/include/asm/tlbflush.h | 86 ++++++++
arch/x86/kernel/Makefile | 1 +
arch/x86/kernel/cpu/bugs.c | 6 +
arch/x86/kernel/cpu/common.c | 38 ++++
arch/x86/kernel/head64.c | 3 +-
arch/x86/kernel/ldt.c | 2 +
arch/x86/kernel/process_64.c | 2 +
arch/x86/mm/Makefile | 3 +-
arch/x86/mm/fault.c | 8 +-
arch/x86/mm/tlb.c | 324 +++++++++++++++++++++++++++++--
14 files changed, 467 insertions(+), 83 deletions(-)

--
2.5.0

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