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SubjectRe: [PATCH v2 2/2] dmaengine: dw: fix cyclic transfer callbacks
Andy Shevchenko <> writes:

> On Mon, Jan 11, 2016 at 5:09 PM, Måns Rullgård <> wrote:
>> Andy Shevchenko <> writes:
>>> On Mon, 2016-01-11 at 13:04 +0000, Mans Rullgard wrote:
>>>> Cyclic transfer callbacks rely on block completion interrupts which
>>>> were
>>>> disabled in commit ff7b05f29fd4 ("dmaengine/dw_dmac: Don't handle
>>>> block
>>>> interrupts"). This re-enables block interrupts so the cyclic
>>>> callbacks
>>>> can work. Other transfer types are not affected as they set the
>>>> INT_EN
>>>> bit only on the last block.
>>>> Fixes: ff7b05f29fd4 ("dmaengine/dw_dmac: Don't handle block
>>>> interrupts")
>>>> Signed-off-by: Mans Rullgard <>
>>> How did you test that?
>> With the ABDAC sound driver on the AVR32. It fails rather miserably
>> without these patches.
>>> From my understanding the custom stuff that does cyclic interrupts
>>> prepares a set of descriptors per period, which at the end of transfer
>>> will generate XFER interrupt. Next period will go in the same way.
>>> Maybe I missed something.
>> The cyclic DMA is done by setting up a set of descriptors, one per
>> period, with the last linked back to the first. The chain never ends,
>> so there is never an XFER interrupt.
> Thanks for clarification.
> Nevertheless, my plan is to get rid of custom implementation of the
> cyclic API in this driver,

Good idea.

> thus, I would suggest to have this patch only for stable and as
> interim for mainline.

Better to start from a working state.

Måns Rullgård

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