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SubjectRe: [PATCH v2] ARM64: Add new Xilinx ZynqMP SoC
Hi Thomas,

On 03/05/2015 03:03 PM, Thomas Petazzoni wrote:
> Dear Michal Simek,
>
> On Thu, 5 Mar 2015 14:53:34 +0100, Michal Simek wrote:
>
>> + pmu {
>> + compatible = "arm,armv8-pmuv3";
>> + interrupts = <0 143 4>,
>> + <0 144 4>,
>> + <0 145 4>,
>> + <0 146 4>;
>
> Any reason not to use
>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> #include <dt-bindings/interrupt-controller/irq.h>
>
> in order to write the more descriptive:
>
> interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
>
> And ditto for all other interrupts properties?

I tend to not to use them because it is just hassle when I want
to move DTSes to different project.

Thanks,
Michal

--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform


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