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SubjectRe: [PATCH] clk: mediatek: Export CPU mux clocks for CPU frequency control
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On 5 March 2015 at 16:21, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> Given the variance of different SoCs I don't think it makes sense
> to try to handle all these cases. Instead the cpufreq-dt driver
> should just call clk_set_rate() on the CPU clock with the desired
> target frequency. Everything else should be handled in the clock
> driver which has intimate knowledge about the SoC anyway.

I agree..

@Russell: I wanted to ask you this since sometime..

On CPU-freq changes we fire PRE/POST notifiers and they are
used for updating loops_per_jiffies which then controls delays.

Now, it is fine to do that for normal frequencies, but what should be
the approach for intermediate frequencies ?

Intermediate freqs: On some platforms changing PLL's straight away
isn't considered safe and so we switch parent to another stable clock,
change PLL rate and switch back.

The *wild* thought I earlier had was to fire these notifiers for even these
intermediate frequencies, otherwise some of the delays will end before
they should have and that *might* cause other problems.

I wanted to know what do you (and other champs) think about this..

Thanks in advance for your advice.


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