Messages in this thread |  | | From | Måns Rullgård <> | Subject | Re: [PATCH 1/3] ata: sata_dwc_460ex: use "dmas" DT property to find dma channel | Date | Mon, 21 Dec 2015 00:58:11 +0000 |
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Andy Shevchenko <andy.shevchenko@gmail.com> writes:
> On Sun, Dec 20, 2015 at 8:49 PM, Måns Rullgård <mans@mansr.com> wrote: >> Julian Margetson <runaway@candw.ms> writes: >>> On 12/20/2015 1:11 PM, Måns Rullgård wrote: >>>> Julian Margetson <runaway@candw.ms> writes: > >>> [ 48.769671] ata3.00: failed command: READ FPDMA QUEUED >> >> Well, that didn't help. I still think it's part of the problem, but >> something else must be wrong as well. The various Master Select fields >> look like a good place to start. > > Master number (which is here would be either 1 or 0) should not affect > as long as they are connected to the same AHB bus (I would be > surprised if they are not).
I think they are not. The relevant part of the block diagram for the 460EX looks something like this:
+-----+ | CPU | +-----+ | +---------------+ | BUS | +---------------+ | | +-----+ +-----+ | DMA | | RAM | +-----+ +-----+ | +------+ | SATA | +------+
The DMA-SATA link is private and ignores the address, which is the only reason the driver can possibly work (it's programming a CPU virtual address there).
>> Also, the manual says the LLP_SRC_EN >> and LLP_DST_EN flags should be cleared on the last in a chain of blocks. >> The old sata_dwc driver does this whereas dw_dma does not. > > Easy to fix, however I can't get how it might affect.
From the Atmel doc:
In Table 17-1 on page 185, all other combinations of LLPx.LOC = 0, CTLx.LLP_S_EN, CFGx.RELOAD_SR, CTLx.LLP_D_EN, and CFGx.RELOAD_DS are illegal, and causes indeterminate or erroneous behavior.
Most likely nothing happens, but I think it ought to be fixed. In fact, I have a patch already.
Come to think of it, I have an AVR32 dev somewhere. Maybe I should dust it off.
-- Måns Rullgård
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